IP Library Granted Patent US 8,943,336
Granted Patent B2
US 8,943,336 · App. 13/175,081 · Granted Jan 27, 2015

Method and apparatus for configurable thermal management

Inventors: Ketan R. Shah (Olympia, WA); Tawfik M. Rahal-Arabi (Tigard, OR); Eric Distefano (Livermore, CA); James G. Hermerding, II (San Jose, CA)
Assignee: Intel Corporation
G06F1/206
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Quick Facts
Patent No.
US 8,943,336
App. No.
13/175,081
Granted
Jan 27, 2015
Kind
B2
Abstract

Embodiments of an apparatus, system and method are described for configurable processor thermal management. An apparatus may comprise, for example, a processor arranged to operate in a plurality of thermal modes comprising a thermal limit down mode, a normal thermal limit mode and a thermal limit up mode, and thermal management logic operative to select a thermal mode based on one or more properties of the apparatus. Other embodiments are described and claimed.

Claims (64)

1. An apparatus, comprising:

a processor arranged to operate in a plurality of thermal modes including at least a first mode having a first thermal limit and a second mode having a second thermal limit different than the first thermal limit, the plurality of thermal modes comprising a plurality of different maximum temperature limits for the processor wherein each of the plurality of thermal modes comprises a set of pre-determined operating frequencies and power consumption level for the processor; and

thermal management logic operative to select a thermal mode based on one or more operating parameters.

2. The apparatus of claim 1 , wherein two or more of the plurality of thermal modes comprise one or more defined thermal, power and performance characteristics.

3. The apparatus of claim 1 , wherein two or more of the plurality of thermal modes have different sets of predetermined operating frequencies and power consumption level.

4. The apparatus of claim 1 , wherein the first mode comprises a thermal limit down mode having a lower temperature limit than the other modes.

5. The apparatus of claim 1 , wherein the second mode comprises a thermal limit up mode having a higher temperature limit than the other modes.

6. The apparatus of claim 1 , comprising a third mode having a third thermal limit different than the first and second thermal limits, the third mode comprising a normal thermal limit mode having a higher temperature limit than the first mode and a lower temperature limit than the second mode.

7. The apparatus of claim 1 , comprising:

one or more storage devices arranged to store configuration information for two or more of the plurality of thermal modes.

8. The apparatus of claim 7 , wherein the configuration information for two or more of the plurality of thermal modes comprises a maximum temperature limit or an operating frequency that are accessible through one or more interfaces.

9. The apparatus of claim 8 , wherein the one or more interfaces comprise one or more of a memory-mapped input/output (MMIO) or a platform environment control interface (PECI).

10. The apparatus of claim 1 , wherein the thermal management logic is operative to select a thermal mode during a boot sequence of the processor.

11. The apparatus of claim 1 , wherein the thermal management logic is operative to dynamically select a thermal mode during operation of the processor.

12. A computer-implemented method, comprising:

selecting a thermal mode for a processor arranged to operate in a plurality of thermal modes including at least a first mode having a first thermal limit and a second mode having a second thermal limit different than the first thermal limit, the plurality of thermal modes comprising a plurality of different maximum temperature limits for the processor wherein each of the plurality of thermal modes comprises a set of pre-determined operating frequencies and power consumption level for the processor;

retrieving configuration information for the selected thermal mode from one or more storage devices; and

operating the processor in the selected thermal mode.

13. The computer-implemented method of claim 12 , wherein the configuration information comprises a maximum temperature limit or set of operating frequencies for two or more of the thermal modes.

14. The computer-implemented method of claim 12 , wherein the configuration information is retrieved using one or more interfaces.

15. The computer-implemented method of claim 14 , wherein the one or more interfaces comprise one or more of a memory-mapped input/output (MMIO) or a platform environment control interface (PECI).

16. The computer-implemented method of claim 12 , comprising:

selecting the first mode comprising a thermal limit down mode; and

operating the processor at a lower temperature limit than the other modes.

17. The computer-implemented method of claim 12 , comprising:

selecting the second mode comprising a thermal limit up mode; and

operating the processor at a higher temperature limit than the other modes.

18. The computer-implemented method of claim 12 , comprising:

selecting a third mode having a third thermal limit different than the first and second thermal limits, the third mode comprising a normal thermal limit mode; and

operating the processor at a higher temperature limit than a temperature limit for the first mode and a lower temperature limit than a temperature limit for the second mode.

19. The computer-implemented method of claim 12 , comprising:

selecting a thermal mode during a boot sequence of the processor.

20. The computer-implemented method of claim 12 , comprising:

dynamically selecting a thermal mode during operation of the processor.

21. An article comprising a computer-readable storage medium containing instructions that if executed by a processor enable a system to:

select a thermal mode for the processor arranged to operate in a plurality of thermal modes including at least a first mode having a first thermal limit and a second mode having a second thermal limit different than the first thermal limit, the plurality of thermal modes comprising a plurality of different maximum temperature limits for the processor wherein each of the plurality of thermal modes comprises a set of pre-determined operating frequencies and power consumption level for the processor;

retrieve configuration information for the selected thermal mode from one or more storage devices; and

operate the processor in the selected thermal mode.

22. The article of claim 21 , wherein the configuration information comprises a maximum temperature limit or set of operating frequencies for two or more of the thermal modes.

23. The article of claim 21 , wherein the configuration information is retrieved using one or more interfaces.

24. The article of claim 23 , wherein the one or more interfaces comprise one or more of a memory-mapped input/output (MMIO) or a platform environment control interface (PECI).

25. The article of claim 21 , comprising instructions that if executed enable the system to:

select the first thermal mode comprising a thermal limit down mode; and

operate the processor at a lower temperature limit than a temperature limit for the other modes.

26. The article of claim 21 , comprising instructions that if executed enable the system to

select the second mode comprising a thermal limit up mode; and

operate the processor at a higher temperature limit than a temperature limit for the other modes.

27. The article of claim 21 , comprising instructions that if executed enable the system to

select a third mode having a third thermal limit different than the first and second thermal limits, the third mode comprising a normal thermal limit mode; and

operate the processor at a higher temperature limit than a temperature limit for the first mode and a lower temperature limit than a temperature limit for the second mode.

28. The article of claim 21 , comprising instructions that if executed enable the system to

select a thermal mode during a boot sequence of the processor or dynamically select a thermal mode during operation of the processor.

29. A system, comprising:

a processor arranged to operate in a plurality of thermal modes comprising at least a first mode having a first thermal limit, a second mode having a second thermal limit and a third mode having a third thermal limit, wherein each of the thermal limits are different, the plurality of thermal modes comprising a plurality of different maximum temperature limits for the processor wherein each of the plurality of thermal modes comprises a set of pre-determined operating frequencies and power consumption level for the processor;

one or more storage devices coupled to the processor and arranged to store configuration information for the plurality of thermal modes;

thermal management logic operative to select a thermal mode based on one or more properties of the system.

30. The system of claim 29 , comprising:

a digital display.

31. The system of claim 29 , comprising:

one or more sensors operative to sense a temperature of the processor.

32. The system of claim 29 , wherein the thermal management logic is operative to:

select the first mode and operate the processor at a lower temperature limit than a temperature limit for the second and third modes;

select the second mode and operate the processor at a higher temperature limit than a temperature limit for the first and third modes; or

select the third mode and operate the processor at a higher temperature limit than a temperature limit for first mode and a lower temperature limit than a temperature limit for the second mode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2012
From: SHAH, KETAN R.; RAHAL-ARABI, TAWFIK M.; DISTEFANO, ERIC; HERMERDING II, JAMES G.
To: INTEL CORPORATION
Reel/Frame 028163/0230 →
Continuity (1)
Related Publication 20130007440A1 · Jan 3, 2013