IP Library › Granted Patent US 8,957,709
Granted Patent B2
US 8,957,709 · App. 14/189,642 · Granted Feb 17, 2015

Driver circuit powered by two power supplies sequentially activated

Inventors: Naoki Itabashi (Yokohama, JP); Keiji Tanaka (Yokohama, JP)
Assignee: Sumitomo Electric Industries, Ltd.
G06F1/3287
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Quick Facts
Patent No.
US 8,957,709
App. No.
14/189,642
Granted
Feb 17, 2015
Kind
B2
Abstract

A driver circuit including front and rear amplifiers each powered by the primary and secondary power supplies, where the latter power supply is generated from the former power supply. The rear amplifier includes a cascade transistor whose base bias is provided from the bias source. The bias source provides the base bias to reduce the base current when the primary power supply is active but the secondary power supply is inactive, and to be equal to the primary power supply when two power supplies become active but the rear amplifier is inactive.

Claims (55)

1. A driver circuit, comprising:

a front amplifier supplied with a primary power supply;

a rear amplifier put in a downstream of the front amplifier, the rear amplifier being supplied with a secondary power supply higher than the primary power supply, the rear amplifier including a current source, a switching transistor, a cascade transistor, and a load resistor connected in series in this order between a ground and the secondary power supply, the cascade transistor being based by a bias source;

a booster configured to generate the secondary power supply from the primary power supply,

wherein the bias source lowers a base bias of the cascade transistor when the primary power supply becomes active but the secondary power supply is left inactive, and raises to a voltage substantially equal to the primary power supply when both of the primary power supply and the secondary power supply become active but the rear amplifier is left inactive.

2. The driver circuit of claim 1 ,

wherein the bias source includes a balancer having a resistor and two transistors connected to the resistor, the two transistor in collectors thereof being commonly connected in series to the resistor between the primary power supply and a ground, the bias source outputting the base bias of the cascade transistor from the commonly connected collectors,

wherein only one of two transistors turns on for running a current flowing through the resistor to cause a voltage drop thereat when only the primary power supply becomes active, and

wherein both of two transistors turn off to cause no voltage drop at the resistor.

3. The driver circuit of claim 2 ,

wherein another of only one of two transistors runs a current to cause a preset voltage drop at the resistor, the preset voltage drop being provided to the base bias of the cascade transistor to regulate a preset current in the rear amplifier.

4. The driver circuit of claim 2 ,

wherein the bias source further includes a pair of transistors, one of transistors being biased based on the primary power supply, the other of transistors being bias based on the secondary power supply,

wherein the only one of transistors in the balancer receivers an output of the one of paired transistors biased based on the secondary power supply.

5. The driver circuit of claim 4 ,

further includes an emitter follower to lower a level of the output of the one of paired transistors.

6. The driver circuit of claim 2 ,

wherein the two transistors in the balancer each has an emitter resistor connected between the emitter and the ground.

7. The driver circuit of claim 1 ,

wherein the rear amplifier further including another switching transistor, another cascade transistor, and another load resistor, the current source, the two switching transistors, the two cascade transistors, and the two load resistors constituting a differential circuit,

wherein the bias source biases a common base bias of the two cascade transistors.

8. The driver circuit of claim 7 ,

wherein the current source is controlled by a control signal, and

wherein the control signal is supplied to the bias source to set the base bias of the cascade transistors in a preset value.

9. The driver circuit of claim 1 ,

wherein the secondary power supply provides a higher supply voltage than the primary power supply.

10. A transmitter optical module, comprising:

a front amplifier having a differential arrangement;

a rear amplifier having the differential arrangement and having a pair of load resistors, a pair of cascade transistor, a pair of switching transistor, and a current source each connected in series between the primary power supply and a ground;

a primary power supply to power the front amplifier

a secondary power supply to power the rear amplifier;

a booster to generate the secondary power supply from the primary power supply; and

a semiconductor optical device driven by the rear amplifier,

wherein

the rear amplifier further includes a bias source powered by the primary power supply,

the bias source provides a base bias to the pair of cascade transistors,

the base bias reduces a base current flowing in a base of the cascade transistors when the primary power supply becomes active but the secondary power supply is left inactive, and the base bias rises to a voltage substantially equal to the primary power supply when the primary power supply and the secondary power supply are active but the current source of the rear amplifier is left inactive.

11. The transmitter optical module of claim 10 ,

further including an emitter follower to shift an output level of the front amplifier down to an input level of the rear amplifier.

12. The transmitter optical module of claim 10 ,

further including two coupling capacitors put between an output of the rear amplifier and the semiconductor optical device,

wherein the semiconductor optical device is driven in AC mode through the coupling capacitors.

13. The transmitter optical module of claim 10 ,

wherein the front amplifier is powered by the primary power supply through a resistor and a current source.

14. The transmitter optical module of claim 10 ,

wherein the semiconductor optical device is a semiconductor modulator.

15. The transmitter optical module of claim 10 ,

wherein the semiconductor optical device is a semiconductor laser diode.

16. The transmitter optical module of claim 10 ,

wherein the bias source includes a differential circuit and a balancer, the differential circuit in the bias source having a pair of transistors, one of the paired transistors being controlled based on the primary power supply and another of the paired transistor being controlled based on the secondary power supply, the balancer including two transistors and a resistor connected in series to two transistors between the primary power supply and the ground, one of two transistors in the balancer being controlled by an output of the another of the paired transistors, another of two transistors being controlled by a control signal gradually increasing after the secondary power supply being active.

17. The transmitter optical module of claim 16 ,

wherein the base bias is determined by a voltage drop caused in the resistor in the balancer and a current flowing through one of two transistors controlled by the output of the another of the paired transistors when the primary power supply becomes active but the secondary power supply is left inactive, and

wherein the base bias is set substantially equal to the primary power supply by turning off the two transistors in the balancer when the primary power supply and the secondary power supply become active but the control signal supplied to the another of two transistors is left inactive.

18. The transmitter optical module of claim 10 ,

wherein the primary power supply provides a supply voltage smaller than a supply voltage of the secondary power supply.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 25, 2014
From: ITABASHI, NAOKI; TANAKA, KEIJI
To: SUMITOMO ELECTRIC INDUSTRIES, LTD
Reel/Frame 032295/0584 →
Priority Claims (1)
JP P2013-035822 · Feb 26, 2013 · national
Continuity (1)
Related Publication 20140245051A1 · Aug 28, 2014