Resistive-switching device capable of implementing multiary addition operation and method for multiary addition operation
A resistive-switching random access memory device includes a memory cell disposed between a bit line and a word line, the memory cell having a resistive-switching element ( 40 ) and a Schottky diode ( 30 ). The Schottky diode ( 30 ) and the resistive-switching element ( 40 ) are connected in series. The Schottky diode ( 30 ) includes a metal layer and a semiconductor layer contacting each other. An interface between the metal layer and the semiconductor layer has a non-planar shape.
1. A resistive-switching random access memory device comprising a memory cell disposed between a bit line and a word line, the memory cell comprising:
a resistive-switching element; and
a Schottky diode being connected in series with the resistive-switching element,
wherein the Schottky diode comprises a metal layer and a semiconductor layer contacting each other, and an interface between the metal layer and the semiconductor layer has a non-planar shape so that the interface has an area greater than that of a bottom surface of the semiconductor layer.
2. The resistive-switching random access memory device according to claim 1 , further comprising an insulation layer, wherein the memory cell is formed in a trench of the insulation layer, so that the semiconductor layer of the Schottky diode is disposed on a bottom and side surfaces of the trench in a conformal manner.
3. The resistive-switching random access memory device according to claim 2 , wherein at least two memory cells are stacked in a perpendicular direction, and the resistive-switching random access memory device further comprises an isolation layer for isolating the adjacent memory cells in the perpendicular direction.
4. The resistive-switching random access memory device according to claim 1 , wherein at least two memory cells are stacked in a perpendicular direction, and the resistive-switching random access memory device further comprises an isolation layer for isolating the adjacent memory cells in the perpendicular direction.
5. The resistive-switching random access memory device according to claim 1 , wherein the resistive-switching element comprises a bipolar resistive-switching element.
6. The resistive-switching random access memory device according to claim 1 , wherein the resistive-switching element is configured to be reversibly switched between a high-resistance state and a low-resistance state based on a voltage applied thereto through the bit line and the word line.
7. The resistive-switching random access memory device according to claim 1 , wherein the resistive-switching element comprises the metal layer, a resistive-switching layer, and a further metal layer, wherein the resistive-switching layer is arranged between the metal layer and the further metal layer.
8. The resistive-switching random access memory device according to claim 2 , wherein a portion of the semiconductor layer extending along the side surface of the trench is protruded with respect to a portion of the semiconductor layer extending along the bottom surface of the trench.