IP Library Granted Patent US 8,969,917
Granted Patent B2
US 8,969,917 · App. 13/788,658 · Granted Mar 3, 2015

Semiconductor device and method for manufacturing same

Inventors: Mayumi Morizuka (Kanagawa-ken, JP); Yoshiharu Takada (Kanagawa-ken, JP)
Assignee: Kabushiki Kaisha Toshiba
H01L29/772H01L29/66431H01L29/36H01L29/402H01L29/66462H01L29/7787H01L29/812H01L29/2003
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Quick Facts
Patent No.
US 8,969,917
App. No.
13/788,658
Granted
Mar 3, 2015
Kind
B2
Abstract

According to an embodiment, a semiconductor device includes a first layer including a first nitride semiconductor, a second layer provided on the first layer and including a second nitride semiconductor having a wider bandgap than the first nitride semiconductor. The device also includes a source electrode and a drain electrode provided on the second layer; and a gate electrode provided on the second layer and located between the source electrode and the drain electrode. The second layer includes a first region between the gate electrode and the drain electrode, the first region being selectively provided in a surface of the second layer and contains fluorine. A concentration of fluorine in the first region is higher than a concentration of fluorine in a portion underneath the gate electrode in the second layer.

Claims (12)

1. A semiconductor device, comprising:

a first layer including a first nitride semiconductor;

a second layer provided on the first layer and including a second nitride semiconductor having a wider bandgap than a bandgap of the first nitride semiconductor;

a source electrode and a drain electrode provided on the second layer;

a gate electrode provided on the second layer and located between the source electrode and the drain electrode, the second layer including a first region between the gate electrode and the drain electrode, the first region being selectively provided in the second layer and containing fluorine distributed in a depth direction with a range of at least ranging from a surface of the second layer to a depth of 5 nanometers; and

a passivation layer provided on the second layer between the source electrode and the gate electrode, and on the second layer between the gate electrode and the drain electrode except on the first region,

wherein a concentration of fluorine contact resistance is highest at a surface of the first region and decreases in the depth direction, and

wherein the fluorine is not contained in a portion underneath the gate electrode in the second layer.

2. The device according to claim 1 , wherein the first region is adjacent to the gate electrode.

3. The device according to claim 1 , wherein a crystal growth face in the second layer is (0001) face.

4. The device according to claim 1 , wherein a two-dimensional electron gas is provided at an interface between the first layer and the second layer.

5. The device according to claim 1 , wherein the first layer is a GaN layer, and the second layer is an AlGaN layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 7, 2013
From: MORIZUKA, MAYUMI; TAKADA, YOSHIHARU
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 029943/0664 →
Priority Claims (1)
JP 2012-074274 · Mar 28, 2012 · national
Continuity (1)
Related Publication 20130256753A1 · Oct 3, 2013