IP Library › Granted Patent US 8,969,937
Granted Patent B2
US 8,969,937 · App. 14/291,069 · Granted Mar 3, 2015

Semiconductor device

Inventors: Chih-Yang Pai (Hsinchu, TW); Kuo-Chi Tu (Hsinchu, TW); Wen-Chuan Chiang (Hsinchu, TW); Chung-Yen Chou (New Taipei, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H01L28/40H01L23/5223H01L23/5226H01L23/53295H01L27/10894H01L28/90H01L21/76832
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,969,937
App. No.
14/291,069
Granted
Mar 3, 2015
Kind
B2
Abstract

A semiconductor device includes a first insulating layer, a contact plug formed in the first insulating layer, a first etch stop layer over the first insulating layer, a second etch stop layer over the first etch stop layer, a second insulating layer over the second etch stop layer and having a contact opening over the contact plug, and a conductive layer disposed in the contact opening and over the contact plug. The contact opening is substantially free of the second etch stop layer, and the first etch stop layer is present in the contact opening.

Claims (47)

1. A semiconductor device, comprising:

a first insulating layer;

a contact plug formed in the first insulating layer;

a first etch stop layer over the first insulating layer;

a second etch stop layer over the first etch stop layer;

a second insulating layer over the second etch stop layer and having a contact opening over the contact plug; and

a conductive layer disposed in the contact opening and over the contact plug;

wherein the contact opening is substantially free of the second etch stop layer; and

wherein the first etch stop layer is present in the contact opening.

2. A semiconductor device according to claim 1 , wherein the conductive layer covers the entire contact opening.

3. A semiconductor device according to claim 1 , wherein the conductive layer directly contacts the contact plug and portions of the first etch stop layer in the contact opening.

4. A semiconductor device according to claim 1 , wherein the conductive layer comprises TiN.

5. A semiconductor device according to claim 1 , wherein the first etch stop layer has a first thickness in the contact opening and a second thickness outside the contact opening, and the first thickness is less than the second thickness.

6. A semiconductor device according to claim 1 , further comprising a silicide layer underlying the contact plug, the contact plug engaging the silicide layer.

7. A semiconductor device according to claim 1 , further comprising a plurality of capacitors, wherein the conductive layer is a bottom electrode of a capacitor of the plurality of capacitors.

8. A semiconductor device, comprising:

a first insulating layer;

a contact plug formed in the first insulating layer;

a first etch stop layer over the first insulating layer;

a second etch stop layer over the first etch stop layer;

a second insulating layer over the second etch stop layer and having a contact opening over the contact plug; and

a conductive layer disposed in the contact opening and over the contact plug;

wherein the conductive layer directly contacts the contact plug and portions of the first etch stop layer in the contact opening.

9. A semiconductor device according to claim 8 , wherein the conductive layer covers an entire inner surface of the contact opening.

10. A semiconductor device according to claim 8 , wherein the conductive layer comprises TiN.

11. A semiconductor device according to claim 8 , wherein the first etch stop layer has a first thickness in the contact opening and a second thickness outside the contact opening, and the first thickness is less than the second thickness.

12. A semiconductor device according to claim 8 , further comprising a silicide layer underlying the contact plug, the contact plug engaging the silicide layer.

13. A semiconductor device according to claim 8 , further comprising a plurality of capacitors, wherein the conductive layer is a bottom electrode of a capacitor of the plurality of capacitors.

14. A semiconductor device, comprising:

a first insulating layer;

a contact plug formed in the first insulating layer;

an etch stop layer over the first insulating layer;

a second insulating layer over the etch stop layer and having a contact opening over the contact plug, the contact opening further extending into a partial thickness of the etch stop layer; and

a conductive layer disposed in the contact opening and over the contact plug;

wherein an upper portion of the contact plug is exposed from the etch stop layer; and

wherein the conductive layer is in electrical contact with the exposed upper portion of the contact plug, and is substantially free of direct contact with the first insulating layer.

15. A semiconductor device according to claim 14 , wherein the conductive layer covers an entire inner surface of the contact opening.

16. A semiconductor device according to claim 14 , wherein the conductive layer directly contacts portions of the etch stop layer in the contact opening.

17. A semiconductor device according to claim 14 , further comprising a plurality of capacitors, wherein the conductive layer is a bottom electrode of a capacitor of the plurality of capacitors.

18. A semiconductor device according to claim 14 , wherein the conductive layer comprises TiN.

19. A semiconductor device according to claim 14 , wherein

the contact plug further comprises a sidewall extending downward from the upper portion to a lower portion of the contact plug; and

the conductive layer is substantially free of direct contact with the sidewall of the contact plug.

20. A semiconductor device according to claim 14 , further comprising:

a further etch stop layer over the second insulating layer; and

a third insulating layer over the further etch stop layer;

wherein the contact opening extends through the third insulating layer, the further etch stop layer, and the second insulating layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 30, 2014
From: PAI, CHIH-YANG; TU, KUO-CHI; CHIANG, WEN-CHUAN; CHOU, CHUNG-YEN
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 032993/0205 →
Continuity (3)
Continuation 14149945 · Jan 8, 2014
Division 13462427 · May 2, 2012
Related Publication 20140264749A1 · Sep 18, 2014