Heterojunction semiconductor device and manufacturing method

1. A heterojunction semiconductor device, comprising a semiconductor body comprising:

a first semiconductor region comprising aluminum gallium nitride;

a second semiconductor region comprising gallium nitride and forming a heterojunction with the first semiconductor region;

an n-type third semiconductor region;

a p-type fourth semiconductor region forming a first rectifying junction with the third semiconductor region; and

an n-type seventh semiconductor region adjoining the heterojunction formed between the first semiconductor region and the second semiconductor region,

wherein the first rectifying junction forms a rectifying junction of a transistor structure, the transistor structure being in ohmic contact with the seventh semiconductor region.

2. The semiconductor device of claim 1 , further comprising an n-type fifth semiconductor region adjoining the heterojunction formed between the first semiconductor region and the second semiconductor region, and forming a second rectifying junction with the fourth semiconductor region, the second rectifying junction forming a further rectifying junction of the transistor structure.

3. The semiconductor device of claim 2 , wherein the fifth semiconductor region has a higher band-gap than the fourth semiconductor region.

4. The semiconductor device of claim 2 , wherein the fifth semiconductor region comprises at least one of aluminum gallium nitride and gallium nitride.

5. The semiconductor device of claim 4 , wherein the fifth semiconductor region comprises silicon as n-type dopants.

6. The semiconductor device of claim 1 , wherein the third semiconductor region has a higher band-gap than the fourth semiconductor region.

7. The semiconductor device of claim 1 , wherein the fourth semiconductor region comprises at least one of silicon and germanium.

8. The semiconductor device of claim 1 , wherein the fourth semiconductor region is a non-monocrystalline semiconductor region.

9. The semiconductor device of claim 1 , wherein at least one of the third semiconductor region and the seventh semiconductor region comprises at least one of aluminum gallium nitride and gallium nitride.

10. The semiconductor device of claim 9 , wherein at least one of the third semiconductor region and the seventh semiconductor region comprises silicon as n-type dopants.

11. The semiconductor device of claim 1 , wherein at least one of the first semiconductor region and the second semiconductor region is an intrinsic semiconductor region.

12. The semiconductor device of claim 1 , wherein the semiconductor body further comprises a further semiconductor region comprising aluminum gallium nitride which forms a further heterojunction with the second semiconductor region, the further heterojunction extending at least to the seventh semiconductor region.

13. The semiconductor device of claim 1 , further comprising at least one of:

an n-type fifth semiconductor region in ohmic contact with the heterojunction and forming a second rectifying junction with the fourth semiconductor region;

a first metallization arranged on a main surface of the semiconductor body and in ohmic contact with the fourth semiconductor region;

a p-type sixth semiconductor region adjoining the fourth semiconductor region, having a higher maximum doping concentration than the fourth semiconductor region and arranged between the fourth semiconductor region and the first metallization;

a second metallization arranged on the main surface and in ohmic contact with the third semiconductor region; and

a third metallization arranged on the main surface and in ohmic contact with the seventh semiconductor region.

14. The semiconductor device of claim 13 , wherein the semiconductor body further comprises a p-type eighth semiconductor region in ohmic contact with the second metallization and adjoining the fifth semiconductor region.

15. The semiconductor device of claim 13 , wherein the second metallization comprises, in a cross-section substantially orthogonal to the main surface, a first portion arranged on the third semiconductor region and a second portion adjoining the first semiconductor region and arranged between the first metallization and the third metallization.

16. A normally-off high-electron-mobility field effect transistor, comprising:

a first metallization;

a second metallization;

a third metallization; and

a semiconductor body, comprising:

a first semiconductor region of a first semiconductor material having a first band-gap;

a second semiconductor region of a second semiconductor material having a second band-gap lower than the first band-gap, the first semiconductor region and the second semiconductor region forming a heterojunction in ohmic contact with the third metallization;

an n-type third semiconductor region in ohmic contact with the second metallization and having a third band-gap; and

a p-type fourth semiconductor region in ohmic contact with the first metallization, the fourth semiconductor region adjoining the third semiconductor region and having a fourth band-gap lower than at least one of the second band-gap and the third band-gap,

wherein the first semiconductor region comprises aluminum gallium nitride or aluminum indium nitride, wherein the second semiconductor region comprises gallium nitride, and wherein the fourth semiconductor region comprises poly-silicon, poly-germanium or poly-silicon-germanium.

17. The transistor of claim 16 , wherein the fourth band-gap is lower than at least one of the second band-gap and the third band-gap by at least about 1 eV.

18. The transistor of claim 16 , further comprising an n-type fifth semiconductor region adjoining at least one of the first semiconductor region, the second semiconductor region and the fourth semiconductor region, wherein the fourth semiconductor region is arranged between the third semiconductor region and the fifth semiconductor region.