IP Library › Granted Patent US 8,975,975
Granted Patent B2
US 8,975,975 · App. 13/994,552 · Granted Mar 10, 2015

Spread spectrum clocking method for wireless mobile platforms

Inventors: Gerhard Schrom (Hillsboro, OR); William Dawson Kesling (Davis, CA); Alexander Lalexan Lyakhov (Portland, OR); Maynard C. Falconer (Portland, OR); Harry G. Skinner (Beaverton, OR)
Assignee: Intel Corporation
H03L7/00H03B29/00H04B1/71
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Quick Facts
Patent No.
US 8,975,975
App. No.
13/994,552
Granted
Mar 10, 2015
Kind
B2
Abstract

According to some embodiments, a method and apparatus are provided to vary a clock signal frequency for a first time period between a lower limit of a range of problematic frequencies and a frequency lower than the lower limit, and vary the clock signal frequency for a second period of time between an upper limit of the range of problematic frequencies and a frequency greater than the upper limit.

Claims (40)

1. A method comprising:

oscillating, via a clock generator, a clock signal frequency for a first time period between a lower limit of a range of problematic frequencies and a frequency lower than the lower limit, wherein the range of problematic frequencies comprise a range surrounding a known frequency associated with a clock harmonic;

transitioning, via a processor, the clock signal frequency across the range of problematic frequencies; and

oscillating the clock signal frequency for a second period of time between an upper limit of the range of problematic frequencies and a frequency greater than the upper limit.

2. The method of claim 1 ,

wherein transitioning the clock signal frequency across the range of problematic frequencies is over a time period greater than or equal to half of a period of a clock frequency oscillation between transitions.

3. The method of claim 1 ,

wherein transitioning the clock signal frequency across the range of problematic frequencies is over a time period less than half of a period of a clock frequency oscillation between transitions.

4. The method of claim 1 , wherein the clock signal frequency is a triangular frequency variation, and wherein a period of a clock signal frequency variation is between 30 kHz and 35 kHz.

5. The method of claim 1 , wherein the clock signal frequency variation is a random walk.

6. An apparatus comprising:

a clock generator, the clock generator to:

oscillate a clock signal frequency for a first time period between a lower limit of a range of problematic frequencies and a frequency lower than the lower limit, wherein the range of problematic frequencies comprise a range surrounding a known frequency associated with a clock harmonic;

and

oscillate the clock signal frequency for a second period of time between an upper limit of the range of problematic frequencies and a frequency greater than the upper limit; and

a processor, the processor to transition the clock signal frequency across the range of problematic frequencies.

7. The apparatus of claim 6 , wherein

transitioning the clock signal frequency across the range of problematic frequencies is over a time period greater than or equal to half of a period of a clock frequency oscillation between transitions.

8. The apparatus of claim 6 , wherein

transitioning the clock signal frequency across the range of problematic frequencies over a time period less than half of a period of a clock frequency oscillation between transitions.

9. The apparatus of claim 6 , wherein the clock signal frequency is a triangular frequency variation, and wherein a period of a clock signal frequency variation is between 30 kHz and 35 kHz.

10. The apparatus of claim 6 , wherein the clock signal frequency variation is a random walk.

11. A non-transitory computer-readable medium comprising instructions that when executed by a processor perform a method, the method comprising:

oscillating, via a clock generator, a clock signal frequency for a first time period between a lower limit of a range of problematic frequencies and a frequency lower than the lower limit, wherein the range of problematic frequencies comprise a range surrounding a known frequency associated with a clock harmonic;

transition the clock signal frequency, via the processor, across the range of problematic frequencies; and

oscillating, via the clock generator, the clock signal frequency for a second period of time between an upper limit of the range of problematic frequencies and a frequency greater than the upper limit.

12. The medium of claim 11 ,

wherein transitioning the clock signal frequency across the range of problematic frequencies is over a time period greater than or equal to half of a period of a clock frequency oscillation between transitions.

13. The medium of claim 11 ,

wherein transitioning the clock signal frequency across the range of problematic frequencies is over a time period less than half of a period of a clock frequency oscillation between transitions.

14. The medium of claim 11 , wherein the clock signal frequency is a triangular frequency variation, and wherein a period of a clock signal frequency variation is between 30 kHz and 35 kHz.

15. The medium of claim 11 , wherein clock signal frequency variation is a random walk.

16. A method comprising:

varying the frequency of a clock signal for a first time period between a frequency lower than a lower limit of a range of problematic frequencies and the lower limit of the clock frequency deviation, wherein the range of problematic frequencies comprise a range surrounding a known frequency associated with a clock harmonic;

varying the frequency of the clock signal for a second time period between the limit of a range of problematic frequencies and the frequency lower than the lower limit; and

transitioning, via a processor, the frequency of the clock signal across the range of problematic frequencies;

varying the frequency of the clock signal for a third period of time between a frequency greater than an upper limit of the range of problematic frequencies and the upper limit of the range of problematic frequencies, and

varying the frequency of the clock signal for a fourth period of time between the upper limit of the range of problematic frequencies and a frequency greater than an upper limit of the range of problematic frequencies.

17. The method of claim 16 ,

wherein transitioning the clock signal frequency across the range of problematic frequencies is between the frequency lower than the lower limit and the frequency greater than the upper limit of the range of problematic frequencies.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 4, 2014
From: SCHROM, GERHARD; KESLING, WILLIAM DAWSON; LYAKHOV, ALEXANDER LALEXAN; FALCONER, MAYNARD C.; SKINNER, HARRY G.
To: INTEL CORPORATION
Reel/Frame 032610/0020 →
Continuity (1)
Related Publication 20130335151A1 · Dec 19, 2013