Systems and methods for achieving high data-rate wireless communication

1. A system for increasing aggregate throughput in a wireless network array comprising:

a first node comprising:

a first plurality of wireless radios;

a processor; and

a memory comprising instructions that, when executed by the processor, are configured to:

prevent each radio in the first plurality of wireless radios from transmitting data packets when any wireless radio in the first plurality of wireless radios is receiving data packets;

estimate an effect of out-of-band emission power created by a first wireless radio in the first plurality of wireless radios when the first wireless radio is transmitting data packets; and

remove the estimated effect of out-of-band emission power created by the first wireless radio from a received power of a second wireless radio in the first plurality of wireless radios before determining if the received power in the second wireless radio is greater than a threshold, wherein when the received power is above the threshold, the processor determines the channel is free; and

progressively decrease the size of each data packet being transmitted in successive data packet transmissions; and

a second node having a second plurality of wireless radios,

wherein the first node is configured to simultaneously wirelessly transmit a first data packet from the first wireless radio in the first plurality of wireless radios to a first wireless radio in the second plurality of wireless radios at a first frequency and wirelessly transmit a second data packet from a second wireless radio in the first plurality of wireless radios to a second wireless radio in the second plurality of wireless radios at a second frequency, wherein the first frequency and second frequency are in a predetermined frequency band.

2. The system of claim 1 , wherein the memory further comprises instructions that, when executed by the processor, are configured to insert a delay time between the start of the first data packet transmission from the first wireless radio in the first plurality of wireless radios and the start of the second data packet transmission from the second wireless radio in the first plurality of wireless radios.

3. The system of claim 1 , wherein the memory further comprises instructions that, when executed by the processor, are configured to ensure that the first data packet transmission, the second data packet transmission, and acknowledgements occur within a predetermined epoch.

4. The system of claim 1 , wherein the memory further comprises instructions that, when executed by the processor, are configured to select a combination of adjacent channels used to transmit the first and second data packets such that aggregate throughput of the system is increased.

5. The system of claim 1 , wherein the memory further comprises instructions that, when executed by the processor, are configured to prevent the first node from transmitting data packets to the second node when the second node is receiving data packets from a third node.

6. The system of claim 1 , wherein the memory further comprises instructions that, when executed by the processor, are configured to determine whether a channel of each wireless radio in the first plurality of wireless radios is free.

7. The system of claim 1 , wherein the aggregate throughput of data transmitted from the first node to the second node exceeds 70% of the sum of the default individual throughputs of each channel used to transmit data.

8. A system for increasing aggregate throughput in a wireless network array comprising:

a first node comprising:

a first plurality of wireless radios;

a processor; and

a memory comprising instructions that, when executed by the processor, are configured to:

prevent each radio in the first plurality of wireless radios from transmitting data packets when any wireless radio in the first plurality of wireless radios is receiving data packets;

ensure that successive data packet transmissions and acknowledgements occur within a predetermined epoch; and

progressively decrease the size of each data packet being transmitted in the successive data packet transmissions;

estimate an effect of out-of-band emission power created by a first wireless radio in the first plurality of wireless radios when the first wireless radio is transmitting data packets; and

remove the estimated effect of out-of-band emission power created by the first wireless radio from a received power of a second wireless radio in the first plurality of wireless radios before determining if the received power of the second wireless radio is greater than a threshold, wherein when the received power is above the threshold, the processor determines the channel is free; and

a second node having a second plurality of wireless radios,

wherein the first node is configured to simultaneously wirelessly transmit a first data packet from the first wireless radio in the first plurality of wireless radios to a first wireless radio in the second plurality of wireless radios at a first frequency and wirelessly transmit a second data packet from a second wireless radio in the first plurality of wireless radios to a second wireless radio in the second plurality of wireless radios at a second frequency, wherein the first frequency and second frequency are in a predetermined frequency band.

9. The system of claim 8 , wherein the memory further comprises instructions that, when executed by the processor, are configured to insert a delay time between the start of the first data packet transmission from the first wireless radio in the first plurality of wireless radios and the start of the second data packet transmission from the second wireless radio in the first plurality of wireless radios.

10. The system of claim 8 , wherein the memory further comprises instructions that, when executed by the processor, are configured to determine whether a channel of each wireless radio in the first plurality of wireless radios is free.

11. The system of claim 8 , wherein the memory further comprises instructions that, when executed by the processor, are configured to select a combination of adjacent channels used to transmit data packets such that aggregate throughput of the system is increased.

12. The system of claim 8 , wherein the memory further comprises instructions that, when executed by the processor, are configured to prevent the first node from transmitting data packets to the second node when the second node is receiving data packets from a third node.

13. The system of claim 8 , wherein the aggregate throughput of data transmitted from the first node to the second node exceeds 70% of the sum of the default individual throughputs of each channel used to transmit data.

14. A method of increasing aggregate throughput in a wireless network array, the method comprising:

providing a first node, the first node comprising;

a first plurality of wireless radios;

a processor; and

a memory comprising instructions that, when executed by the processor, are configured to:

prevent each radio in the first plurality of wireless radios from transmitting data packets when any wireless radio in the first plurality of wireless radios is receiving data packets;

ensure that successive data packet transmissions and acknowledgements occur within a predetermined epoch;

progressively decrease the size of each data packet being transmitted in the successive data packet transmissions; and

estimate an effect of out-of-band emission power created by a first wireless radio in the first plurality of wireless radios when the first wireless radio is transmitting data packets; and

remove the estimated effect of out-of-band emission power created by the first wireless radio from a received power of a second wireless radio in the first plurality of wireless radios before determining if the received power of the second wireless radio is greater than a threshold, wherein when the received power is above the threshold, the processor determines the channel is free;

providing a second node having a plurality of wireless radios; and

simultaneously wirelessly transmitting a first data packet from the first wireless radio in the first plurality of wireless radios to a first wireless radio in the second plurality of wireless radios at a first frequency and wirelessly transmitting a second data packet from a second wireless radio in the first plurality of wireless radios to a second wireless radio in the second plurality of wireless radios at a second frequency, wherein the first frequency and second frequency are in a predetermined frequency band.

15. The method of claim 14 , wherein the memory further comprises instructions that, when executed by the processor, are configured to insert a delay time between the start of the first data packet transmission from the first wireless radio in the first plurality of wireless radios and the start of the second data packet transmission from the second wireless radio in the first plurality of wireless radios.

16. The method of claim 14 , wherein the memory further comprises instructions that, when executed by the processor, are configured to prevent the first node from transmitting data packets to the second node when the second node is receiving data packets from a third node.

17. The method of claim 14 , wherein the aggregate throughput of data transmitted from the first node to the second node exceeds 70% of the sum of the default individual throughputs of each channel used to transmit data.