IP Library › Granted Patent US 8,987,063
Granted Patent B2
US 8,987,063 · App. 13/372,406 · Granted Mar 24, 2015

Manufacturing method of semiconductor device

Inventors: Ryoji Harata (Tsuruta, JP); Hiroaki Narita (Tsuruta, JP)
Assignee: Renesas Electronics Corporation
H01L23/49503H01L23/49575H01L21/565H01L21/568H01L24/48H01L24/97H01L2224/32257B29C45/14655B29C45/0046H01L23/3107H01L2224/32245H01L2224/48095H01L2224/48137H01L2224/48247H01L2224/48465H01L2224/48471H01L2224/4848H01L2224/73265H01L2924/18165H01L2924/01029H01L2224/97H01L24/32H01L24/45H01L24/73H01L24/85H01L2224/45144H01L2224/85439H01L2924/10253H01L2924/10329H01L2924/1421H01L2924/13091H01L2224/83191H01L2924/13064H01L2924/30107
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Quick Facts
Patent No.
US 8,987,063
App. No.
13/372,406
Granted
Mar 24, 2015
Kind
B2
Abstract

A manufacturing method of a semiconductor device of a thin resin sealed multichip rectangular package having wire connection between the chips, wherein: at least one chip is fixed to a die pad thinned more than a die pad support lead, the die pad is supported by die pad support leads arranged to respectively connect a pair of long sides of the rectangle, and sealing resin is introduced from one side of the pair of long sides when resin molding is performed.

Claims (49)

1. A manufacturing method of a semiconductor device comprising the steps of:

(a) providing a lead frame having a plurality of unit device regions including a plurality of connection leads, a die pad, and a plurality of die pad support leads which are thicker than the die pad and that support the die pad, a shape in a plan view of each of the unit devices being a rectangle;

(b) arranging a first semiconductor chip having a plurality of bonding pads in each of the unit device regions;

(c) arranging a second semiconductor chip having plurality of bonding pads over a front surface of the die pad of each of the unit device regions such that the second semiconductor chip is aligned with the first semiconductor chip along a long side of each of the unit device regions;

(d) electrically connecting a first bonding pad group of the bonding pads of the first semiconductor chip and that of the second semiconductor chip, respectively, via a first bonding wire group, in each of the unit device regions;

(e) electrically connecting a second bonding pad group of the bonding pads of the first semiconductor chip and a first connection lead group of the connection leads, respectively, via a second bonding wire group;

(f) electrically connecting a second bonding pad group of the bonding pads of the second semiconductor chip and a second connection lead group of the connection leads, respectively, via a third bonding wire group; and

(g) after the steps (d), (e), and (f), forming a resin sealing body by sealing the unit device regions with sealing resin,

wherein the die pad support leads connect between one and the other of a pair of long sides facing to each other in each of the unit device regions, and

wherein the sealing resin in the step (g) is supplied from the one side toward the other side of the pair of long sides.

2. The manufacturing method of the semiconductor device according to claim 1 ,

wherein a back surface of the die pad is exposed from the resin sealing body.

3. The manufacturing method of the semiconductor device according to claim 2 ,

wherein back surfaces of the connection leads are exposed from the resin sealing body.

4. The manufacturing method of the semiconductor device according to claim 3 ,

wherein the connection leads is approximately as thick as the die pad support leads.

5. The manufacturing method of the semiconductor device according to claim 4 ,

wherein the die pad is thinned by etching from its surface side.

6. The manufacturing method of the semiconductor device according to claim 5 ,

wherein the step (b) is carried out by fixing the first semiconductor chip to a lead frame back surface tape attached to a back surface of the lead frame via a first adhesive layer previously provided over a back surface of the first semiconductor chip.

7. The manufacturing method of the semiconductor device according to claim 6 ,

wherein a surface of the first adhesive layer on an opposite side of the first semiconductor chip is exposed from the resin sealing body.

8. The manufacturing method of the semiconductor device according to claim 7 ,

wherein in the step (d), the first semiconductor chip side is ball-bonded, and the second semiconductor chip side is wedge-bonded.

9. The manufacturing method of the semiconductor device according to claim 8 ,

wherein the second semiconductor chip is thinner than the first semiconductor chip.

10. The manufacturing method of the semiconductor device according to claim 9 ,

wherein the first semiconductor chip is an antenna switch, and the second semiconductor chip is a control chip that controls the first semiconductor chip.

11. The manufacturing method of the semiconductor device according to claim 10 ,

wherein the first semiconductor chip is a compound semiconductor chip, and the second semiconductor chip is a silicon semiconductor chip.

12. The manufacturing method of the semiconductor device according to claim 10 ,

wherein the first semiconductor chip is a GaAs semiconductor chip, and the second semiconductor chip is the silicon semiconductor chip.

13. The manufacturing method of the semiconductor device according to claim 12 ,

wherein the plurality of rectangular unit device regions are arranged in matrix.

14. The manufacturing method of the semiconductor device according to claim 13 ,

wherein positions of the die pad support leads in each unit device region approximately match those of a plurality of die pad support leads in an adjacent unit device region that is adjacent to one long side in the unit device region.

15. The manufacturing method of the semiconductor device according to claim 14 ,

wherein the resin sealing body collectively seals the two or more unit device regions.

16. The manufacturing method of the semiconductor device according to claim 15 , further comprising the steps of:

(h) after the step (g), peeling the lead frame back surface tape; and

(i) after the step (h), separating the resin sealing body into portions corresponding to the individual unit device region.

17. The manufacturing method of the semiconductor device according to claim 16 ,

wherein the step (i) is carried out by dicing using a rotating blade.

18. The manufacturing method of the semiconductor device according to claim 17 ,

wherein when the lead frame back surface tape is peeled in the step (h), the first adhesive layer remains on the first semiconductor chip side.

19. The manufacturing method of the semiconductor device according to claim 18 ,

wherein a thickness of the resin sealing body is 0.5 millimeter or less.

20. The manufacturing method of the semiconductor device according to claim 19 ,

wherein the individually separated resin sealing body is a QFN package.

Assignments (2)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 15, 2012
From: HARATA, RYOJI; NARITA, HIROAKI
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 027709/0073 →
Priority Claims (1)
JP 2011-028504 · Feb 14, 2011 · national
Continuity (1)
Related Publication 20120208324A1 · Aug 16, 2012