IP Library › Granted Patent US 8,990,454
Granted Patent B2
US 8,990,454 · App. 13/603,735 · Granted Mar 24, 2015

Memory system and wireless communication method by memory system

Inventors: Kuniaki Ito (Chiba-ken, JP); Takashi Wakutsu (Kanagawa-ken, JP); Yasufumi Tsumagari (Kanagawa-ken, JP); Shuichi Sakurai (Kanagawa-ken, JP)
Assignee: Kabushiki Kaisha Toshiba
G06F11/0796G06F13/16G06K19/07
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Quick Facts
Patent No.
US 8,990,454
App. No.
13/603,735
Granted
Mar 24, 2015
Kind
B2
Abstract

An aspect of the present embodiment, there is provided a memory system including a nonvolatile memory area, a first interface be connected to a first host device, a second interface connected to a second host device, and a controller controlling the first interface such that the first device is configured to prohibit to write data into the nonvolatile memory area on a basis of a command provided from the second host device before the second host device writes data into the nonvolatile memory area through the second interface, wherein the first interface notices an error to the first host device when the first device writes data into the nonvolatile memory area, and the second host device transmits data from an portion not to be written in the nonvolatile memory area to the first host.

Claims (44)

1. A memory system, comprising:

a nonvolatile memory area;

a first interface configured to be connected to a first host device;

a second interface configured to be connected to a second host device through wireless communication; and

a controller configured to control the first interface such that the first host device is configured to prohibit to write data into the nonvolatile memory area on a basis of a command provided from the second host device before the second host device writes data into the nonvolatile memory area through the second interface;

wherein the first interface notices an error to the first host device when the first host device writes data into the nonvolatile memory area in a state that the first host device is prohibited to write data into the nonvolatile memory area, and the second host device transmits data from a portion of the nonvolatile memory area other than a portion of the nonvolatile memory area in which the second host device writes data into the nonvolatile memory area.

2. The memory system of claim 1 , wherein

a state, in which the first host device is prohibited to write data into the nonvolatile memory area, is configured to be cancelled by being provided a cancel command from the second host device.

3. The memory system of claim 1 , wherein

The second host device is configured to control the second interface so as to prevent to write data into the nonvolatile memory area from the first host device in a case that the second host device writes data into the nonvolatile memory area.

4. The memory system of claim 1 , wherein

the second host device is configured to issue the a cancel command so that the first interface issues an error to the first host device in the state that the first host device is prohibited to write data into the nonvolatile memory area.

5. The memory system of claim 1 , wherein

the nonvolatile memory area includes an initialization time, and an initialization time of data written in the nonvolatile memory area by the second host device is configured to be set by the second host device.

6. A memory system, comprising:

a nonvolatile memory area;

a first interface configured to be connected to a first host device;

a second interface configured to be connected to a second host device through wireless communication; and

a controller configured to control the first interface on a basis of a command provided from the second host device such that the first host device is prohibited to write data into the nonvolatile memory area, when the second host device writes data into the nonvolatile memory area through the second interface.

7. The memory system of claim 6 , wherein

the first interface notices an error to the first host device when the first device writes data into the nonvolatile memory area in a state that the first interface is controlled such that the first device is prohibited to write data into the nonvolatile memory area.

8. The memory system of claim 6 , wherein

the second host device transmits data from a memory portion of the nonvolatile memory area other than a portion of the nonvolatile memory area in which the second host device writes data into the nonvolatile memory area.

9. The memory system of claim 6 , wherein

the controller automatically acts the first interface to prohibit writing date into the nonvolatile memory area, when receiving data from the second host device.

10. The memory system of claim 6 , wherein

a state, in which the first host device is prohibited to write data into the nonvolatile memory area, is configured to be cancelled by being provided a cancel command from the second host device.

11. The memory system of claim 6 , wherein

The second host device is configured to control the second interface so as to prevent to write data into the nonvolatile memory area from the first host device in a case that the second host device writes data into the nonvolatile memory area.

12. The memory system of claim 6 , wherein

the second host device is configured to issue a cancel command so that the first interface issues an error to the first host device in the state where the first host device is prohibited to write data into the nonvolatile memory area.

13. The memory system of claim 6 , wherein

the nonvolatile memory area includes an initialization time, and an initialization time of data written in the nonvolatile memory area by the second host device is configured to be set by the second host device.

14. A wireless communication method by a memory system, the memory system comprising a nonvolatile memory area, a first interface, a second interface and a control unit, comprising:

setting the memory system in a first host device;

connecting the second interface to a second host device through wireless communication;

controlling the first interface by the control unit to prohibit to write data from the first host device to the nonvolatile memory area on a basis of a command provided from the second host device; and

transmitting data from the second host device to the nonvolatile memory area.

15. The method of claim 14 , wherein

the control unit is received a command from the second host device to provide the command to the first interface in the controlling the first interface.

16. The method of claim 14 , further comprising:

issuing an error from the first interface to the first host device when the first host device writes data into the nonvolatile memory area, in a state that the first interface is controlled such that the first host device is prohibited to write data into the nonvolatile memory area.

17. The method of claim 14 , further comprising:

the second host device transmits data from a memory portion of the nonvolatile memory area other than a portion of the nonvolatile memory area in which the second host device writes data into the nonvolatile memory area.

Assignments (5)
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043709/0035 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 10, 2012
From: ITO, KUNIAKI; WAKUTSU, TAKASHI; TSUMAGARI, YASUFUMI; SAKURAI, SHUICHI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 029100/0673 →
Priority Claims (1)
JP P2012-087946 · Apr 6, 2012 · national
Continuity (1)
Related Publication 20130268802A1 · Oct 10, 2013