Semiconductor device
As a display device has a higher definition, the number of pixels, gate lines, and signal lines are increased. When the number of the gate lines and the signal lines are increased, there occurs a problem that it is difficult to mount an IC chip including a driver circuit for driving the gate and signal lines by bonding or the like, whereby manufacturing cost is increased. A pixel portion and a driver circuit for driving the pixel portion are provided over the same substrate, and at least part of the driver circuit includes a thin film transistor using an oxide semiconductor interposed between gate electrodes provided above and below the oxide semiconductor. The pixel portion and the driver portion are provided over the same substrate, whereby manufacturing cost can be reduced.
1. A semiconductor device comprising:
a first transistor comprising:
a first gate electrode;
a first insulating layer over the first gate electrode;
a source electrode over the first insulating layer;
a drain electrode over the first insulating layer;
an oxide semiconductor layer electrically connected to the source electrode and the drain electrode;
a second insulating layer over the oxide semiconductor layer; and
a second gate electrode over the second insulating layer; and
a second transistor comprising:
a gate electrode:
the first insulating layer over the gate electrode;
a source electrode over the first insulating layer;
a drain electrode over the first insulating layer;
an oxide semiconductor layer electrically connected to the source electrode and the drain electrode; and
the second insulating layer over the oxide semiconductor layer,
wherein one of the source electrode and the drain electrode of the first transistor is electrically connected to one of the source electrode and the drain electrode of the second transistor,
wherein the gate electrode is electrically connected to the one of the source electrode and the drain electrode of the second transistor,
wherein a width of the second gate electrode is larger than a width of a channel formation region of the oxide semiconductor layer, and the second gate electrode covers the channel formation region,
wherein the first transistor is one of an enhancement type transistor and a depletion type transistor and the second transistor is the other of the enhancement type transistor and the depletion type transistor, and
wherein a threshold value of the first transistor is controlled by a voltage applied to the second gate electrode.
2. The semiconductor device according to claim 1 , wherein the second gate electrode completely covers the channel formation region.
3. The semiconductor device according to claim 1 , wherein the second gate electrode completely covers the oxide semiconductor layer.
4. The semiconductor device according to claim 1 , wherein the semiconductor device is a display device.
5. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer of the first transistor and the oxide semiconductor layer of the second transistor comprise at least one of indium, gallium, and zinc.
6. The semiconductor device according to claim 1 , wherein the first gate electrode and the second gate electrode have the same potential.
7. The semiconductor device according to claim 1 , wherein the first gate electrode and the second gate electrode have different potentials.
8. The semiconductor device according to claim 1 , wherein the first transistor and the second transistor are n-channel transistors.
9. A semiconductor device comprising:
a first transistor comprising:
a first gate electrode;
a first insulating layer over the first gate electrode;
a source electrode over the first insulating layer;
a drain electrode over the first insulating layer;
an oxide semiconductor layer electrically connected to the source electrode and the drain electrode;
a second insulating layer over the oxide semiconductor layer; and
a second gate electrode over the second insulating layer; and
a second transistor comprising:
a gate electrode:
the first insulating layer over the gate electrode;
a source electrode over the first insulating layer;
a drain electrode over the first insulating layer;
an oxide semiconductor layer electrically connected to the source electrode and the drain electrode; and
the second insulating layer over the oxide semiconductor layer,
wherein one of the source electrode and the drain electrode of the first transistor is electrically connected to one of the source electrode and the drain electrode of the second transistor,
wherein the gate electrode is electrically connected to the one of the source electrode and the drain electrode of the second transistor,
wherein a width of the second gate electrode is larger than a width of the first gate electrode, and the second gate electrode covers the first gate electrode,
wherein the first transistor is one of an enhancement type transistor and a depletion type transistor and the second transistor is the other of the enhancement type transistor and the depletion type transistor, and
wherein a threshold value of the first transistor is controlled by a voltage applied to the second gate electrode.
10. The semiconductor device according to claim 9 , wherein the second gate electrode completely covers the first gate electrode.
11. The semiconductor device according to claim 9 , wherein the semiconductor device is a display device.
12. The semiconductor device according to claim 9 , wherein the oxide semiconductor layer of the first transistor and the oxide semiconductor layer of the second transistor comprise at least one of indium, gallium, and zinc.
13. The semiconductor device according to claim 9 , wherein the first gate electrode and the second gate electrode have the same potential.
14. The semiconductor device according to claim 9 , wherein the first gate electrode and the second gate electrode have different potentials.
15. The semiconductor device according to claim 9 , wherein the first transistor and the second transistor are n-channel transistors.