Semiconductor device and method of manufacturing the same
View Patent ↗The present disclosure relates to a semiconductor device and a method of manufacturing the same. The semiconductor device may include a first metal gate electrode provided in a NMOS region of a substrate; and a second metal gate electrode provided in a PMOS region of the substrate, wherein the first and second metal gate electrodes may be formed of TiN material or TiAlN material. Here, the first metal gate electrode may have a higher titanium (Ti) content than the second metal gate electrode, and the second metal gate electrode may have a higher nitrogen (N) content than the first metal gate electrode.
1. A semiconductor device comprising:
a first metal gate electrode provided in an NMOS region of a substrate; and
a second metal gate electrode provided in a PMOS region of the substrate,
wherein the first metal gate electrode are formed of TiN material or TiAlN material,
wherein the first metal electrode has a higher titanium (Ti) content than the second metal gate electrode,
wherein the second metal gate electrode has a higher nitrogen (N) content than the first metal gate electrode,
wherein the first metal gate electrode comprises a Ti-rich TiN layer, and
wherein the second metal gate electrode comprises a stack structure of an N-rich TiN layer and a Ti-rich TiN layer.
2. The semiconductor device according to claim 1 ,
wherein the first metal gate electrode comprises a stack structure of a Ti-rich TiN layer and an N-rich TiN layer, and
wherein the second metal gate electrode comprises an N-rich TiN layer.
3. The semiconductor device according to claim 1 , wherein the second metal gate electrode has a higher work function than the first metal gate electrode.
4. The semiconductor device according to claim 3 , wherein the first metal gate electrode has a work function of between about 4.0 eV to about 4.3 eV.
5. The semiconductor device according to claim 3 , wherein the second metal gate electrode has a work function of between about 4.8 eV to about 5.2 eV.
6. The semiconductor device according to claim 1 , further comprising:
a gate insulation layer formed under the first and the second metal gate electrodes,
wherein the gate insulation layer includes a high permittivity (high-k) dielectric material having a dielectric constant of about 3.0 or more.
7. The semiconductor device according to claim 1 , wherein the first metal gate electrode has a higher aluminum (Al) content than the second metal gate electrode.