Display device
A protective circuit includes a non-linear element which includes a gate electrode, a gate insulating layer covering the gate electrode, a first oxide semiconductor layer overlapping with the gate electrode over the gate insulating layer, and a first wiring layer and a second wiring layer whose end portions overlap with the gate electrode over the first oxide semiconductor layer and in which a conductive layer and a second oxide semiconductor layer are stacked. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be reduced and the characteristics of the non-linear element can be improved.
1. A display device comprising:
a first wiring connected to a pixel portion, the first wiring including a first portion, a second portion and a third portion;
a common wiring; and
a protective circuit comprising a first thin film transistor and a second thin film transistor,
wherein the first thin film transistor includes:
a first gate electrode;
a first gate insulating layer over the first gate electrode;
a first oxide semiconductor layer over the first gate electrode with the first gate insulating layer interposed therebetween;
a first conductive layer in contact with the first oxide semiconductor layer; and
a second conductive layer in contact with the first oxide semiconductor layer,
wherein the first gate electrode is directly connected to the first wiring,
wherein the first conductive layer is electrically connected to the second portion through a first transparent conductive layer, and
wherein the second conductive layer is directly connected to the common wiring, and
wherein the second thin film transistor includes:
a second gate electrode;
a second gate insulating layer over the second gate electrode;
a second oxide semiconductor layer over the second gate electrode with the second gate insulating layer interposed therebetween;
a third conductive layer in contact with the second oxide semiconductor layer; and
a fourth conductive layer in contact with the second oxide semiconductor layer,
wherein the second gate electrode is electrically connected to the common wiring through a second transparent conductive layer,
wherein the third conductive layer is directly connected to the first wiring,
wherein the fourth conductive layer is directly connected to the common wiring,
wherein the first portion overlaps with the common wiring,
wherein the third portion is closer to the pixel portion than the first portion and the second portion,
wherein a first distance between edges of the first portion is narrower than a second distance between edges of the second portion, and
wherein a direction of the first distance is parallel to a direction of the second distance.
2. The display device according to claim 1 ,
wherein the first oxide semiconductor layer and the second oxide semiconductor layer each comprises indium, gallium, and zinc.
3. A display device comprising:
a first wiring connected to a pixel portion;
a common wiring; and
a protective circuit comprising a first thin film transistor, a second thin film transistor and a third thin film transistor,
wherein the first thin film transistor includes:
a first gate electrode;
a first gate insulating layer over the first gate electrode;
a first oxide semiconductor layer over the first gate electrode with the first gate insulating layer interposed therebetween;
a first conductive layer in contact with the first oxide semiconductor layer; and
a second conductive layer in contact with the first oxide semiconductor layer,
wherein the first conductive layer is connected to the pixel portion, and
wherein the second conductive layer is connected to the common wiring,
wherein the second thin film transistor includes:
a second gate electrode;
a second gate insulating layer over the second gate electrode;
a second oxide semiconductor layer over the second gate electrode with the second gate insulating layer interposed therebetween;
a third conductive layer in contact with the second oxide semiconductor layer; and
a fourth conductive layer in contact with the second oxide semiconductor layer,
wherein the second gate electrode is connected to the pixel portion,
wherein the third conductive layer is connected to the pixel portion, and
wherein the fourth conductive layer is connected to the first gate electrode,
wherein the third thin film transistor includes:
a third gate electrode;
a third gate insulating layer over the third gate electrode;
a third oxide semiconductor layer over the third gate electrode with the third gate insulating layer interposed therebetween;
a fifth conductive layer in contact with the third oxide semiconductor layer; and
a sixth conductive layer in contact with the third oxide semiconductor layer,
wherein the third gate electrode is connected to the common wiring,
wherein the fifth conductive layer is connected to the first gate electrode, and
wherein the sixth conductive layer is connected to the common wiring,
wherein the second gate electrode comprises a first region where the second gate electrode overlaps with the second oxide semiconductor layer, and a second region where the second gate electrode does not overlap with the second oxide semiconductor layer,
wherein the second region is in contact with the first wiring,
wherein a first distance between edges of the second region is narrower than a second distance between edges of the first region, and
wherein each of a direction of the first distance and a direction of the second distance is parallel to a channel length direction of the second thin film transistor.
4. The display device according to claim 3 ,
wherein the first oxide semiconductor layer, the second oxide semiconductor layer and the third oxide semiconductor layer each comprises indium, gallium, and zinc.
5. The display device according to claim 1 ,
wherein the first gate electrode, the first conductive layer, and the third conductive layer are connected to the pixel portion through a scan line.
6. The display device according to claim 1 ,
wherein the first gate electrode, the first conductive layer, and the third conductive layer are connected to the pixel portion through a signal line.
7. The display device according to claim 1 ,
wherein the first gate electrode, the first conductive layer, and the third conductive layer are connected to the pixel portion through a capacitor bus line.
8. The display device according to claim 3 ,
wherein the first conductive layer, the second gate electrode, and the third conductive layer are connected to the pixel portion through a scan line.
9. The display device according to claim 3 ,
wherein the first conductive layer, the second gate electrode, and the third conductive layer are connected to the pixel portion through a signal line.
10. The display device according to claim 3 ,
wherein the first conductive layer, the second gate electrode, and the third conductive layer are connected to the pixel portion through a capacitor bus line.
11. A display device comprising:
a first wiring connected to a pixel portion;
a common wiring; and
a protective circuit comprising a first thin film transistor and a second thin film transistor,
wherein the first thin film transistor includes:
a first gate electrode;
a first gate insulating layer over the first gate electrode;
a first oxide semiconductor layer over the first gate electrode with the first gate insulating layer interposed therebetween;
a first conductive layer in contact with the first oxide semiconductor layer; and
a second conductive layer in contact with the first oxide semiconductor layer,
wherein the first gate electrode is electrically connected to the common wiring,
wherein the first conductive layer is electrically connected to the first wiring, and
wherein the second conductive layer is directly connected to the common wiring, wherein the second thin film transistor includes:
a second gate electrode;
a second gate insulating layer over the second gate electrode;
a second oxide semiconductor layer over the second gate electrode with the second gate insulating layer interposed there between;
a third conductive layer in contact with the second oxide semiconductor layer;
and a fourth conductive layer in contact with the second oxide semiconductor layer,
wherein the second gate electrode is directly connected to the first wiring, wherein the third conductive layer is electrically connected to the first wiring, and
wherein the fourth conductive layer is directly connected to the common wiring, and wherein the second gate electrode comprises a first region where the second gate electrode overlaps with the second oxide semiconductor layer, and a second region where the second gate electrode does not overlap with the second oxide semiconductor layer,
wherein the second region is in contact with the first wiring,
wherein a first distance between edges of the second region is narrower than a second distance between edges of the first region, and
wherein each of a direction of the first distance and a direction of the second distance is parallel to a channel length direction of the second thin film transistor.
12. The display device according to claim 11 ,
wherein the first oxide semiconductor layer and the second oxide semiconductor layer each comprises indium, gallium, and zinc.
13. The display device according to claim 11 ,
wherein the first gate electrode, the first conductive layer, and the third conductive layer are connected to the pixel portion through a scan line.
14. The display device according to claim 11 ,
wherein the first gate electrode, the first conductive layer, and the third conductive layer are connected to the pixel portion through a signal line.
15. The display device according to claim 11 ,
wherein the first gate electrode, the first conductive layer, and the third conductive layer are connected to the pixel portion through a capacitor bus line.
16. The display device according to claim 1 , further comprising:
a connecting terminal comprising a first layer and a second layer over the first layer; and
an FPC electrically connected to the connecting terminal,
wherein the first layer is formed of a material of the first conductive layer, and
wherein the second layer is formed of a material of a pixel electrode of the pixel portion.
17. The display device according to claim 3 , further comprising:
a connecting terminal comprising a first layer and a second layer over the first layer; and
an FPC electrically connected to the connecting terminal,
wherein the first layer is formed of a material of the first conductive layer, and
wherein the second layer is formed of a material of a pixel electrode of the pixel portion.
18. The display device according to claim 11 , further comprising:
a connecting terminal comprising a first layer and a second layer over the first layer; and
an FPC electrically connected to the connecting terminal,
wherein the first layer is formed of a material of the first conductive layer, and
wherein the second layer is formed of a material of a pixel electrode of the pixel portion.