Temperature grading for band gap engineering of photovoltaic devices
A method for fabricating a photovoltaic device includes depositing a p-type layer at a first temperature and depositing an intrinsic layer while gradually increasing a deposition temperature to a final temperature. The intrinsic layer deposition is completed at the final temperature. An n-type layer is formed on the intrinsic layer.
1. A method for fabricating a photovoltaic device, comprising:
depositing a p-type layer at a first temperature;
depositing an intrinsic layer directly on the p-type layer while continuously increasing a deposition temperature to a final temperature, including forming a band gap alignment region at an interface between the p-type layer and the intrinsic layer such that band gap energy includes a continuous transition;
completing the intrinsic layer at the final temperature; and
forming an n-type layer directly on the intrinsic layer.
2. The method as recited in claim 1 , wherein the p-type layer, the intrinsic layer and the n-type layer include amorphous silicon or an amorphous compound including silicon.
3. The method as recited in claim 1 , wherein the first temperature includes about 200 degrees Celsius and the final temperature includes about 250 degrees Celsius.
4. The method as recited in claim 1 , wherein continuously increasing a deposition temperature includes a linear increase in a temperature profile.
5. The method as recited in claim 1 , wherein completing the p-type layer includes isolating a p-type dopant source.
6. The method as recited in claim 1 , wherein the band gap alignment region is free of discontinuous band gap energy barriers.
7. The method as recited in claim 1 , further comprising providing a degradation efficiency that is less than a degradation efficiency provided by including carbon at an interface between the p-type layer and the intrinsic layer.
8. The method as recited in claim 1 , wherein a difference between the first temperature and the final temperature is between about 50 to about 80 degrees Celsius.
9. A method for fabricating a photovoltaic device, comprising:
providing an electrode;
depositing a p-type layer at a first temperature on the electrode;
isolating a dopant source to complete the p-type layer;
forming an intrinsic layer directly on the p-type layer while continuously increasing a deposition temperature;
continuing to continuously increase the deposition temperature to a final temperature to complete the intrinsic layer wherein a difference between the first temperature and the final temperature is between about 50 to about 80 degrees Celsius; and
forming an n-type layer directly on the intrinsic layer.
10. The method as recited in claim 9 , wherein the p-type layer, the intrinsic layer and the n-type layer include amorphous silicon or an amorphous compound including silicon.
11. The method as recited in claim 9 , wherein the first temperature includes about 200 degrees Celsius and the final temperature includes about 250 degrees Celsius.
12. The method as recited in claim 9 , wherein continuously increasing a deposition temperature includes a linear increase in a temperature profile.
13. The method as recited in claim 9 , wherein continuously increasing a deposition temperature includes forming a band gap alignment region between the p-type layer and the intrinsic layer such that band gap energy includes a continuous transition between the p-type layer and the intrinsic layer.
14. The method as recited in claim 13 , wherein the band gap alignment region is free of discontinuous band gap energy barriers between the p-type layer and the intrinsic layer.
15. The method as recited in claim 9 , further comprising providing a degradation efficiency that is less than a degradation efficiency provided by including carbon at an interface between the p-type layer and the intrinsic layer.
16. The method as recited in claim 9 , wherein providing an electrode includes forming one of a transparent conductive electrode or a metal electrode.
17. A method for fabricating a photovoltaic device, comprising:
depositing a p-type layer at a first temperature;
depositing an intrinsic layer directly on the p-type layer while continuously and linearly increasing a deposition temperature to a final temperature;
completing the intrinsic layer at the final temperature; and
forming an n-type layer directly on the intrinsic layer.
18. The method as recited in claim 17 , wherein the p-type layer, the intrinsic layer and the n-type layer include amorphous silicon or an amorphous compound including silicon.
19. The method as recited in claim 17 , wherein the first temperature includes about 200 degrees Celsius and the final temperature includes about 250 degrees Celsius.
20. The method as recited in claim 17 , wherein completing the p-type layer includes isolating a p-type dopant source.
21. The method as recited in claim 17 , further comprising providing a degradation efficiency that is less than a degradation efficiency provided by including carbon at an interface between the p-type layer and the intrinsic layer.
22. The method as recited in claim 17 , wherein a difference between the first temperature and the final temperature is between about 50 to about 80 degrees Celsius.
23. The method as recited in claim 17 , wherein gradually increasing a deposition temperature includes forming a band gap alignment region at an interface between the p-type layer and the intrinsic layer such that band gap energy includes a gradual transition.
24. The method as recited in claim 23 , wherein the band gap alignment region is free of discontinuous barriers.