IP Library Granted Patent US 9,041,000
Granted Patent B2
US 9,041,000 · App. 14/096,962 · Granted May 26, 2015

Thin film transistor array substrate having non linear active layer and organic light emitting display apparatus including the same

Inventor: Mu-Kyung Jeon (Yongin, KR)
Assignee: SAMSUNG DISPLAY CO., LTD.
H01L27/3244H01L29/786
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Quick Facts
Patent No.
US 9,041,000
App. No.
14/096,962
Granted
May 26, 2015
Kind
B2
Abstract

A thin film transistor array substrate includes: a driving thin film transistor including an active layer having a bent shape, where the active layer includes: a first active pattern extending substantially in a first direction; and a second active pattern extending substantially in a second direction perpendicular to the first direction and connected to the first active pattern, and a gate electrode disposed on the active layer, where gate electrode overlaps the first active pattern and exposes the second active pattern; and a capacitor including a first electrode defined by the gate electrode of the driving thin film transistor, and a second electrode disposed on the first electrode, where the second electrode overlaps substantially an entire surface of the first electrode.

Claims (68)

1. A thin film transistor array substrate comprising:

a driving thin film transistor comprising:

an active layer having a bent shape, wherein the active layer comprises:

a first active pattern extending substantially in a first direction; and

a second active pattern extending substantially in a second direction perpendicular to the first direction and connected to the first active pattern; and

a gate electrode disposed on the active layer, wherein gate electrode overlaps the first active pattern and exposes the second active pattern; and

a capacitor comprising:

a first electrode defined by the gate electrode of the driving thin film transistor; and

a second electrode disposed on the first electrode, wherein the second electrode overlaps substantially an entire surface of the first electrode.

2. The thin film transistor array substrate of claim 1 , wherein

a hole is defined in a region of the gate electrode corresponding to the second active pattern.

3. The thin film transistor array substrate of claim 1 , wherein an opening is defined in the second electrode of the capacitor.

4. The thin film transistor array substrate of claim 3 , further comprising:

a first insulating film which covers the active layer;

a second insulating film which covers the first electrode of the capacitor; and

an interlayer insulating film which covers the second electrode of the capacitor.

5. The thin film transistor array substrate of claim 4 , further comprising:

a connection wiring disposed on the interlayer insulating film, wherein the connection wire connects the first electrode of the capacitor and a thin film transistor through a contact hole defined through the second insulating film and the interlayer insulating film in a region corresponding to the opening in the second electrode of the capacitor.

6. The thin film transistor array substrate of claim 5 , further comprises:

a compensation thin film transistor which compensates a threshold voltage of the driving thin film transistor; and

an initialization thin film transistor which transmits an initialization voltage to the gate electrode of the driving thin film transistor.

7. The thin film transistor array substrate of claim 6 , wherein

a gate electrode of the compensation thin film transistor and a gate electrode of the initialization thin film transistor are disposed in a same layer as the first electrode of the capacitor.

8. The thin film transistor array substrate of claim 5 , further comprises:

a driving voltage line disposed in a same layer as the connection wiring and connected to the second electrode of the capacitor,

wherein the driving voltage line transmits a driving voltage to the second electrode of the capacitor.

9. The thin film transistor array substrate of claim 1 , wherein

the active layer comprises a crystallized semiconductor material.

10. A thin film transistor array substrate comprising:

a driving thin film transistor defined by a plurality of thin film transistors connected in series, wherein the driving thin film transistor comprises:

an active layer comprising:

a plurality of channel regions extending substantially in a first direction; and

a plurality of nodes extending substantially in a second direction perpendicular to the first direction, wherein the plurality of nodes connects the plurality of channel regions; and

a gate electrode disposed overlapping the plurality of channel regions, wherein the gate electrode exposes the plurality of nodes; and

a capacitor comprising:

a first electrode defined by the gate electrode of the driving thin film transistor; and

a second electrode disposed on the first electrode, wherein the second electrode overlaps the driving thin film transistor.

11. The thin film transistor array substrate of claim 10 , wherein

a cut-out is defined in a region of the gate electrode corresponding to the plurality of nodes, wherein the cut-out extends from a side of the gate electrode.

12. The thin film transistor array substrate of claim 10 , wherein

a hole is defined in the region of the gate electrode corresponding to the plurality of nodes.

13. An organic light emitting display apparatus comprising:

a driving thin film transistor comprising:

an active layer having a bent shape, wherein the active layer comprises:

a first active pattern extending substantially in a first direction; and

a second active pattern extending substantially in a second direction perpendicular to the first direction and connected to the first active pattern; and

a gate electrode disposed on the active layer, wherein the gate electrode overlaps the active layer and exposes the second active pattern;

a capacitor comprising:

a first electrode defined by the gate electrode; and

a second electrode disposed on the first electrode, wherein the second electrode overlaps substantially an entire surface of the first electrode; and

an organic light emitting diode which emits light by receiving a driving current from the driving thin film transistor.

14. The organic light emitting display apparatus of claim 13 , wherein a hole is defined in a region of the gate electrode corresponding to the second active pattern.

15. The organic light emitting display apparatus of claim 13 , wherein

an opening is defined in the second electrode of the capacitor.

16. The organic light emitting display apparatus of claim 13 , further comprising:

a first insulating film which covers the active layer;

a second insulating film which covers the first electrode of the capacitor; and

an interlayer insulating film which covers the second electrode of the capacitor.

17. The organic light emitting display apparatus of claim 16 , further comprising:

a connection wiring disposed on the interlayer insulating film, wherein the connection wire connects the first electrode of the capacitor and a thin film transistor through a contact hole defined through the second insulating film and the interlayer insulating film in a region corresponding to the opening in the second electrode of the capacitor.

18. The organic light emitting display apparatus of claim 17 , further comprising:

a compensation thin film transistor which compensates a threshold voltage of the driving thin film transistor; and

an initialization thin film transistor which transmits an initialization voltage to the gate electrode of the driving thin film transistor.

19. The organic light emitting display apparatus of claim 18 , wherein

a gate electrode of the compensation thin film transistor and a gate electrode of the initialization thin film transistor are disposed in a same layer as the first electrode of the capacitor.

20. The organic light emitting display apparatus of claim 17 , further comprising:

a driving voltage line disposed in a same layer as the connection wiring and connected to the second electrode of the capacitor,

wherein the driving voltage line transmits a driving voltage to the second electrode of the capacitor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 4, 2013
From: JEON, MU-KYUNG
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 031717/0406 →
Priority Claims (1)
KR 10-2013-0085696 · Jul 19, 2013 · national
Continuity (1)
Related Publication 20150021561A1 · Jan 22, 2015