Non-volatile memory device and read method thereof
Disclosed is a nonvolatile memory device which includes a memory cell connected to a bit line and a word line; a page buffer electrically connected to the bit line and sensing data stored in the memory cell; and a control logic controlling the page buffer to vary a develop time of the bit line or a sensing node connected to the bit line according to a current temperature during a read operation.
1. A nonvolatile memory device, comprising:
a memory cell connected to a bit line and a word line;
a page buffer, including a sensing node, electrically connected to the bit line to read data stored in the memory cell by sensing the sensing node;
a control logic controlling the page buffer to vary a develop time of the bit line being pre-charged according to a current temperature during a read operation; and
wherein the control logic comprises:
a parameter selector selecting a develop time corresponding to the current temperature; and
a timing controller controlling the page buffer to sense the memory cell according to the selected develop time.
2. The nonvolatile memory device as claimed in claim 1 , wherein the memory cell is included in a three-dimensional NAND string formed in a direction vertical to a substrate.
3. The nonvolatile memory device as claimed in claim 1 , wherein the control logic senses the memory cell according to a first develop time when the current temperature is over a reference temperature, and to a second develop time, longer than the first develop time, when the current temperature is below the reference temperature.
4. The nonvolatile memory device as claimed in claim 1 , wherein the parameter selector includes develop times corresponding to a plurality of temperature ranges, respectively.
5. The nonvolatile memory device as claimed in claim 1 , wherein the develop time of the bit line being pre-charged corresponds to a time when the bit line being pre-charged is electrically isolated from the sensing node.
6. The nonvolatile memory device as claimed in claim 1 , wherein the control logic controls the page buffer to vary a develop time of the sensing node, the develop time of the sensing node corresponding to a period of time from a point of time when a setup transistor for pre-charging the bit line is turned off, until a point of time when a transistor for connecting the bit line and the sensing node is turned off.
7. The nonvolatile memory device as claimed in claim 6 , wherein the page buffer further comprises a clamp transistor for clamping the sensing node into a predetermined level during the develop time of the sensing node.
8. The nonvolatile memory device as claimed in claim 1 , further comprising:
a voltage generator adjusting and providing a read voltage to be supplied to the word line according to the current temperature.
9. The nonvolatile memory device as claimed in claim 1 , further comprising:
a temperature sensor sensing the current temperature to provide the sensed current temperature to the control logic.
10. A nonvolatile memory device, comprising:
a plurality of memory cells connected in series to a bit line;
a page buffer connected to the bit line and sensing the memory cell;
a voltage generator providing a selection read voltage or a non-selection read voltage to a word line; and
a control logic controlling the page buffer or the voltage generator to adjust channel currents of the memory cells according to a current temperature during a read operation, wherein
the control logic includes:
a parameter selector selecting a develop time corresponding to the current temperature; and
a timing controller controlling the page buffer to sense the memory cell according to the selected develop time.
11. The nonvolatile memory device as claimed in claim 10 , wherein the control logic controls the page buffer to adjust a develop time of the bit line according to the current temperature.
12. The nonvolatile memory device as claimed in claim 10 , wherein the control logic controls the voltage generator to adjust a level of a non-selection read voltage to be provided to a word line of unselected memory cells according to the current temperature.
13. A nonvolatile memory device, comprising:
a memory cell connected to a bit line and a word line;
a page buffer electrically connected to the bit line and sensing data stored in the memory cell; and
a control logic controlling the page buffer to vary a width of a sensed threshold distribution according to a current temperature during a read operation, wherein
the control logic reduces the width of the sensed voltage distribution when the current temperature of the read operation is less than a temperature at which the memory cell was programmed.
14. The nonvolatile memory device as claimed in claim 13 , further comprising:
a temperature sensor sensing the current temperature to provide the sensed current temperature to the control logic.
15. The nonvolatile memory device as claimed in claim 13 , wherein the control logic reduces the width of the sensed voltage distribution by increasing a develop time of the bit line or a sensing node connected to the bit line.
16. The nonvolatile memory device as claimed in claim 13 , wherein the memory cell is included in a three-dimensional NAND string formed in a direction vertical to a substrate.