IP Library › Granted Patent US 9,048,421
Granted Patent B2
US 9,048,421 · App. 14/022,984 · Granted Jun 2, 2015

Variable resistance memory device and methods of forming the same

Inventors: Dongjun Seong (Seongnam-si, KR); Yoocheol Shin (Hwaseong-si, KR)
Assignee: Samsung Electronics Co., Ltd.
H01L45/12H01L45/08H01L45/1226H01L45/146H01L45/1683H01L27/2436H01L27/249
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Quick Facts
Patent No.
US 9,048,421
App. No.
14/022,984
Granted
Jun 2, 2015
Kind
B2
Abstract

Variable resistance memory devices and methods of forming the same are disclosed. The devices may include an additional barrier layer that is a portion of a variable resistance layer and that is formed before forming a horizontal electrode layer. Due to the presence of the additional barrier layer, it may be possible to cure loss or damage of the variable resistance layer.

Claims (36)

1. A variable resistance memory device, comprising:

a layer;

a vertical electrode on the layer;

horizontal electrode layers and insulating layers sequentially and alternately stacked on the layer, the horizontal electrode layers and the insulating layers being adjacent to the vertical electrode; and

a variable resistance layer between the vertical electrode and the horizontal electrode layers,

wherein the variable resistance layer comprises:

a switching layer between the vertical electrode and the horizontal electrode layer and between the vertical electrode and the insulating layer;

a first barrier layer between the switching layer and the insulating layer; and

a second barrier layer between the switching layer and the horizontal electrode layer and between the insulating layer and the horizontal electrode layer.

2. The device of claim 1 , further comprising an oxygen exchange layer in contact with the switching layer.

3. The device of claim 2 , wherein at least one of the switching layer and the oxygen exchange layer comprises a non-stoichiometric transition metal oxide.

4. The device of claim 1 , wherein the first and second barrier layers comprise stoichiometric transition metal oxides.

5. The device of claim 1 , further comprising a third barrier layer between the vertical electrode and the switching layer.

6. The device of claim 1 , wherein at least one of the first and second barrier layers is thinner than the switching layer.

7. The device of claim 1 , wherein an interface between the first and second barrier layers has a curved profile.

8. The device of claim 1 , wherein at least one of the first and second barrier layers comprises a metal oxide having a metal element that is different from a metal element contained in the switching layer.

9. The device of claim 1 , wherein the horizontal electrode layers comprise a plurality of odd-numbered word lines and a plurality of even-numbered word lines that are alternatingly stacked on the layer, and

wherein the odd-numbered word lines are electrically connected to each other, and wherein the even-numbered word lines are electrically connected to each other and are electrically isolated from the odd-numbered word lines.

10. The device of claim 1 , further comprising:

a selection gate electrode between the layer and a first one of the horizontal electrode layers that is closest to the layer;

a selection gate insulating layer between the selection gate electrode and the layer; and

first and second doped regions in the layer adjacent to opposite sides of the selection gate electrode.

11. A variable resistance memory device, comprising:

a layer;

a horizontal electrode layer on the layer;

an insulating layer on the horizontal electrode layer;

a vertical electrode adjacent the horizontal electrode layer and the insulating layer; and

a variable resistance layer between the vertical electrode and the horizontal electrode layer;

wherein the variable resistance layer comprises a switching layer on a sidewall of the vertical electrode between the vertical electrode and the horizontal electrode layer and between the vertical electrode and the insulating layer, a first barrier layer between the switching layer and the insulating layer, and a second barrier layer between the switching layer and the horizontal electrode layer;

wherein the second barrier layer extends on an upper surface of the horizontal electrode layer between the insulating layer and the horizontal electrode layer; and

wherein the switching layer comprises a transition metal oxide layer that exhibits variable resistance characteristics.

12. The device of claim 11 , further comprising an oxygen exchange layer in contact with the switching layer.

13. The device of claim 12 , wherein at least one of the switching layer and the oxygen exchange layer comprises a non-stoichiometric transition metal oxide, and wherein the first and second barrier layers comprise stoichiometric transition metal oxides.

14. The device of claim 11 , further comprising a third barrier layer between the vertical electrode and the switching layer.

15. The device of claim 11 , wherein at least one of the first and second barrier layers is thinner than the switching layer.

16. The device of claim 11 , wherein an interface between the first and second barrier layers has a curved profile.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 12, 2013
From: SEONG, DONGJUN; SHIN, YOOCHEOL
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 031189/0777 →
Priority Claims (1)
KR 10-2012-0101872 · Sep 14, 2012 · national
Continuity (1)
Related Publication 20140077143A1 · Mar 20, 2014