Low-K dielectric protection spacer for patterning through substrate vias through a low-K wiring layer

1. A method, comprising:

etching a via opening through a low-K value dielectric interconnect layer;

depositing a protective layer in the via opening and on the low-K value dielectric interconnect layer;

etching at least a portion of the protective layer from the bottom of the via opening and from a horizontal surface of the low-K value dielectric interconnect layer, the etching leaving the protective layer as a protective sidewall spacer on a sidewall of the via opening;

re-flowing the protective layer so that an organic protective layer covers sidewalls of the through substrate via;

etching a through substrate via through the bottom of the via opening and through the semiconductor substrate;

and filling the through substrate via.

2. The method of claim 1 , in which the low-K value dielectric interconnect layer comprises at least one low-K value inter-metal dielectric (IMD) layer.

3. The method of claim 1 , in which the protective layer is formed from a material selected from a group consisting of unfluorinated silica glass (USG), tetraethyl orthosilicate (TEOS), silicon oxide, and organic films.

4. The method of claim 1 , in which etching at least the portion of the protective layer comprises performing a directional reactive-ion etch (RIE) to remove the protective layer from horizontal portions of the low-K value dielectric interconnect layer.

5. The method of claim 1 , in which depositing the protective layer comprises forming the protective layer on a top surface of the low-K value dielectric interconnect layer.

6. The method of claim 1 , further comprising:

incorporating the through substrate via within a semiconductor die; and

integrating the semiconductor die into at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a personal digital assistant (PDA), a fixed location data unit, and a computer.

7. A semiconductor die, comprising:

a semiconductor substrate;

a shallow trench isolation (STI) region within the semiconductor substrate;

an inter-layer dielectric (ILD) layer on a surface of the semiconductor substrate and on a surface of the STI region;

a low-K value dielectric interconnect layer on a surface of the ILD layer opposite the surface of the semiconductor substrate;

at least one through substrate via extending through the low-K value dielectric interconnect layer, the ILD layer, the STI region and the semiconductor substrate; and

a protective spacer between the at least one through substrate via and the low-K value dielectric interconnect layer.

8. The semiconductor die of claim 7 , in which the low-K value dielectric interconnect layer comprises at least one low-K value inter-metal dielectric (IMD) layer.

9. The semiconductor die of claim 7 , in which the protective spacer is comprised of a material selected from a group consisting of unfluorinated silica glass (USG), tetraethyl orthosilicate (TEOS), silicon oxide, and organic films.

10. The semiconductor die of claim 7 , in which the protective spacer is on a sidewall portion of the low-K value dielectric interconnect layer.

11. The semiconductor die of claim 7 , incorporated into at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a personal digital assistant (PDA), a fixed location data unit, and a computer.

12. A semiconductor die, comprising:

a semiconductor substrate;

a shallow trench isolation (STI) region within the semiconductor substrate;

an inter-layer dielectric (ILD) layer on a surface of the semiconductor substrate and on a surface of the STI region;

a low-K value dielectric interconnect layer on a surface of the ILD layer opposite the surface of the semiconductor substrate;

at least one through via extending through the low-K value dielectric interconnect layer, the ILD layer, the STI region and the semiconductor substrate; and

means for protecting the low-K value dielectric interconnect layer disposed between the at least one through via and the low-K value dielectric interconnect layer.

13. The semiconductor die of claim 12 , in which the low-K value dielectric interconnect layer comprises at least one low-K value inter-metal dielectric (IMD) layer.

14. The semiconductor die of claim 12 , in which the means for protecting the low-K value dielectric interconnect layer is comprised of a material selected from a group consisting of unfluorinated silica glass (USG), tetraethyl orthosilicate (TEOS), silicon oxide, and organic films.

15. The semiconductor die of claim 12 , in which the means for protecting the low-K value dielectric interconnect layer is formed on a sidewall portion of the low-K value dielectric interconnect layer.

16. The semiconductor die of claim 12 , incorporated into at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a personal digital assistant (PDA), a fixed location data unit, and a computer.

17. A method, comprising:

the step for etching a via opening through a low-K value dielectric interconnect layer;

the step for depositing a protective layer in the via opening and on the low-K value dielectric interconnect layer;

the step for etching the protective layer from the bottom of the via opening and from a horizontal surface of the low-K value dielectric interconnect layer, the etching leaving the protective layer as a protective sidewall spacer on a sidewall of the via opening;

the step for re-flowing the protective layer so that an organic protective layer covers sidewalls of the through substrate via;

the step for etching a through substrate via through the bottom of the via opening being covered with the protective sidewall spacer and through a semiconductor substrate; and

the step for filling the through substrate via.

18. The method of claim 17 , further comprising the step for incorporating the through substrate via within a semiconductor die.

19. The method of claim 18 , further comprising the step for incorporating the semiconductor die into at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a personal digital assistant (PDA), a fixed location data unit, and a computer.