IP Library Granted Patent US 9,064,893
Granted Patent B2
US 9,064,893 · App. 13/892,424 · Granted Jun 23, 2015

Gradient dopant of strained substrate manufacturing method of semiconductor device

Inventors: Chin-I Liao (Tainan, TW); Chin-Cheng Chien (Tainan, TW)
Assignee: UNITED MICROELECTRONICS CORP.
H01L29/66636H01L21/02532H01L21/0251H01L21/02579H01L21/0262H01L21/02636
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,064,893
App. No.
13/892,424
Granted
Jun 23, 2015
Kind
B2
Abstract

A manufacturing method of a semiconductor device is provided. The method includes at least the following steps. A gate structure is formed on a substrate. An epitaxial structure is formed on the substrate, wherein the epitaxial structure comprises SiGe, and the Ge concentration in the epitaxial structure is equal to or higher than 45%. A first cap layer is formed on the epitaxial structure, wherein the first cap layer comprises Si. The first cap layer is doped with boron for forming a flat top surface of the first cap layer.

Claims (37)

1. A manufacturing method of a semiconductor device, comprising:

forming a gate structure on a substrate;

forming an epitaxial structure on the substrate, wherein the epitaxial structure comprises SiGe, and the Ge concentration in the epitaxial structure is 45-60%;

doping the epitaxial structure with boron, and the boron concentration in the epitaxial structure is higher than 1E20 cm −3 ;

forming a first cap layer on the epitaxial structure, wherein the first cap layer comprises Si;

forming a second cap layer between the first cap layer and the epitaxial structure, wherein the second cap layer comprises SiGe and has a gradient Ge concentration upwardly decreased; and

doping the first cap layer with boron for forming a flat top surface of the first cap layer.

2. The manufacturing method of the semiconductor device according to claim 1 , wherein the substrate has at least a recess on a side of the gate structure, and the epitaxial structure is formed in the recess.

3. The manufacturing method of the semiconductor device according to claim 2 , further comprising:

forming an under layer on the bottom surface of the recess, wherein the under layer comprises SiGe and has a gradient Ge concentration upwardly increased from 40% to 55%.

4. The manufacturing method of the semiconductor device according to claim 1 , wherein the gate structure is formed on the epitaxial structure.

5. The manufacturing method of the semiconductor device according to claim 1 , further comprising:

forming an under layer below the epitaxial structure, wherein the under layer comprises SiGe and has a gradient Ge concentration upwardly increased from 40% to 55%.

6. The manufacturing method of the semiconductor device according to claim 1 , wherein the thickness of the first cap layer is equal to or larger than 50 Å.

7. The manufacturing method of the semiconductor device according to claim 1 , further comprising:

forming a spacer on a sidewall of the gate structure.

8. The manufacturing method of the semiconductor device according to claim 1 , wherein the step of forming the first cap layer and the step of doping the first cap layer are performed simultaneously.

9. The manufacturing method of the semiconductor device according to claim 1 , wherein a gas source for boron is B 2 H 6 , a gas source for Si is SiH 4 , and a gas source for Ge is GeH 4 .

10. The manufacturing method of the semiconductor device according to claim 1 , wherein the step of forming the epitaxial structure comprising:

forming a first epitaxial layer on the substrate; and

forming a second epitaxial layer, wherein the second epitaxial layer is formed between the first cap layer and the first epitaxial layer, and the Ge concentration in the first epitaxial layer is lower than the Ge concentration in the second epitaxial layer.

11. A manufacturing method of a semiconductor device, comprising:

forming a gate structure on a substrate;

forming an epitaxial structure on the substrate, wherein the epitaxial structure is doped with boron and comprises SiGe, the Ge concentration in the epitaxial structure is equal to or higher than 45%, and the boron concentration in the epitaxial structure is higher than 1E20 cm-3;

forming a first cap layer on the epitaxial structure, wherein the first cap layer comprises Si and is doped with boron, and the boron concentration in the first cap layer is higher than 5E20 cm-3; and

forming an under layer below the epitaxial structure, wherein the under layer comprises SiGe and has a gradient Ge concentration upwardly increased from 40% to 55%.

12. The manufacturing method of the semiconductor device according to claim 11 , wherein the substrate has at least a recess on a side of the gate structure, and the epitaxial structure is formed in the recess.

13. The manufacturing method of the semiconductor device according to claim 12 , wherein the under layer is formed on the bottom surface of the recess.

14. The manufacturing method of the semiconductor device according to claim 11 , further comprising:

forming a second cap layer between the first cap layer and the epitaxial structure, wherein the second cap layer comprises SiGe and has a gradient Ge concentration upwardly decreased.

15. The manufacturing method of the semiconductor device according to claim 11 , wherein a thickness of the first cap layer is equal to or larger than 50 Å.

16. The manufacturing method of the semiconductor device according to claim 11 , further comprising:

forming a spacer on a sidewall of the gate structure.

17. The manufacturing method of the semiconductor device according to claim 11 , wherein a gas source for boron is B 2 H 6 , a gas source for Si is SiH 4 , and a gas source for Ge is GeH 4 .

18. The manufacturing method of the semiconductor device according to claim 11 , wherein the step of forming the epitaxial structure comprising:

forming a first epitaxial layer on the substrate; and

forming a second epitaxial layer, wherein the second epitaxial layer is formed between the first cap layer and the first epitaxial layer, and the Ge concentration in the first epitaxial layer is lower than the Ge concentration in the second epitaxial layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 13, 2013
From: LIAO, CHIN-I; CHIEN, CHIN-CHENG
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 030401/0187 →
Continuity (1)
Related Publication 20140335674A1 · Nov 13, 2014