General input/output architecture, protocol and related methods to implement flow control

1. An apparatus comprising:

a device to:

receive a packet from a differential, point-to-point serial data link;

identify, from a traffic class field in the packet, a traffic class associated with the packet;

identify a mapping of the traffic class to a virtual channel;

send the packet using the virtual channel; and

generate physical layer information for the packet to include an identification of the virtual channel.

2. The apparatus of claim 1 , wherein the link comprises at least one of a physical layer to support a PCI-based protocol layer and a physical layer including one or more other protocols.

3. The apparatus of claim 1 , wherein the link comprises a PCI-based protocol-compliant data link.

4. The apparatus of claim 1 , wherein the traffic class field is to be included in transaction layer information of the packet.

5. The apparatus of claim 1 , wherein the virtual channel is one of a plurality of virtual channels.

6. The apparatus of claim 5 , wherein the plurality of virtual channels includes at least eight virtual channels.

7. The apparatus of claim 5 , wherein the plurality of virtual channels includes at least one virtual channel to handle isochronous traffic.

8. The apparatus of claim 5 , wherein the plurality of virtual channels are channels supported by a particular system component.

9. The apparatus of claim 5 , wherein the plurality of virtual channels includes a default virtual channel.

10. An apparatus comprising:

a root complex to:

identify a traffic class of a packet from transaction layer information of the packet;

use a virtual channel capability structure to identify a particular virtual channel associated with the traffic class, wherein the particular virtual channel is to be included in a set of at least eight supported virtual channels, the set of virtual channels to include a default virtual channel, and wherein each virtual channel is to comprise a respective one of a plurality of independent logical data flows for a differential, point-to-point serial data link;

assemble physical layer information for the packet to include an identification of the particular virtual channel; and

send the packet, to include transaction layer information to identify the traffic class and the physical layer information, over the link to a device.

11. A method comprising:

receiving a packet over a differential, point-to-point serial data link;

identifying, from a traffic class field in the packet, a traffic class associated with the packet;

identifying a virtual channel associated with the traffic class from a mapping of traffic classes to virtual channels;

sending the packet using the virtual channel; and

generating physical layer information for the packet to include an identification of the virtual channel.

12. The method of claim 11 , wherein the data link provides support for full-duplex communication.

13. The method of claim 11 , wherein the packet is received from a first device and sent to a second device.

14. The method of claim 11 , wherein the packet is sent to include an identification of the traffic class and the physical layer information.

15. The method of claim 11 , wherein the virtual channel is a particular one of a plurality of virtual channels.

16. A system comprising:

an interconnect, wherein the interconnect comprises a serial point-to-point data link;

a data structure mapping traffic classes to virtual channels;

a first device; and

a second device communicatively coupled to the first device using the interconnect, the second device to:

identify, from a traffic class field in the packet, a traffic class associated with the packet;

identify a virtual channel associated with the traffic class from the data structure;

send the packet to the first device using the virtual channel; and

generate physical layer information for the packet to include an identification of the virtual channel.

17. The system of claim 16 , wherein the interconnect comprises a general input/output interconnect architecture.

18. The system of claim 16 , further comprising a third device, wherein the packet is received from a third device.

19. The system of claim 16 , wherein the second device comprises a switch.

20. The system of claim 16 , wherein the second device comprises a root complex.