Method and apparatus for memory encryption with integrity check and protection against replay attacks
A method and apparatus to provide cryptographic integrity checks and replay protection to protect against hardware attacks on system memory is provided. A mode of operation for block ciphers enhances the standard XTS-AES mode of operation to perform memory encryption by extending a tweak to include a “time stamp” indicator. A tree-based replay protection scheme uses standard XTS-AES to encrypt contents of a cache line in the system memory. A Message-Authentication Code (MAC) for the cache line is encrypted using enhanced XTS-AES and a “time stamp” indicator associated with the cache line. The “time stamp indicator” is stored in a processor.
1. A method comprising:
generating, by a processor, a message-authentication code (MAC) for a block of data associated with an application;
providing, in a processor, a plurality of counters, each counter associated with one of a plurality of MAC cache lines in a memory;
encrypting, by the processor, the MAC, the MAC encrypted using a tweak, the tweak including a cache line identifier for the MAC cache line to store the MAC and a timestamp value read from the counter associated with the MAC cache line;
storing, by the processor, the block of data in a cache line of the memory; and
storing, by the processor, the MAC in a MAC cache line in the memory, the memory separate from the processor.
2. The method of claim 1 , wherein the application is a secure application, the block of data is encrypted by the processor and the encrypted block of data is stored by the processor in the cache line of memory.
3. The method of claim 1 , wherein the tweak is an XEX encryption mode with tweak and ciphertext stealing (XTS)-Advanced Encryption Standard (AES) tweak.
4. The method of claim 1 , wherein the tweak is a LRW tweak.
5. The method of claim 1 , wherein the MAC cache lines are in a protected region of the memory.
6. The method of claim 1 , wherein the cache lines are in a replay protected region of the memory.
7. The method of claim 1 , wherein the MAC has 32-bits, the MAC cache line has 512-bits and the cache line has 512-bits.
8. An apparatus comprising:
a plurality of counters each counter associated with one of a plurality of MAC cache lines in an external memory; and
logic, the logic to generate a message-authentication code (MAC) for a block of data associated with an application stored in the external memory, the logic to encrypt the MAC, the MAC encrypted using a tweak, the tweak including a cache line identifier for the MAC cache line to store the MAC and a timestamp value read from the counter associated with the MAC cache line, the logic to store the block of data in a cache line of the external memory and to store the MAC in a MAC cache line in the external memory.
9. The apparatus of claim 8 , wherein the application is a secure application, the block of data is encrypted by the processor and the encrypted block of data is stored by the processor in the cache line of memory.
10. The apparatus of claim 8 , wherein the tweak is an XEX encryption mode with tweak and ciphertext stealing (XTS)-Advanced Encryption Standard (AES) tweak.
11. The apparatus of claim 8 , wherein the tweak is a LRW tweak.
12. The apparatus of claim 8 , wherein the MAC cache lines are in a protected region of the external memory.
13. The apparatus of claim 8 , wherein the cache lines are in a replay protected region of the external memory.
14. The apparatus of claim 8 , wherein the MAC has 32-bits, the MAC cache line has 512-bits and the cache line has 512-bits.
15. An article including a non-transitory machine-accessible medium having associated information,
wherein the information, when accessed, results in a machine performing:
generating, by a processor, a message-authentication code (MAC) for a block of data associated with an application;
providing, in a processor, a plurality of counters, each counter associated with one of a plurality of MAC cache lines in a memory;
encrypting, by the processor, the MAC, the MAC encrypted using a tweak, the tweak including a cache line identifier for the MAC cache line to store the MAC and a timestamp value read from the counter associated with the MAC cache line;
storing, by the processor, the block of data in a cache line of the memory; and
storing, by the processor, the MAC in a MAC cache line in the memory, the memory separate from the processor, the block of data is encrypted by the processor and the encrypted block of data is stored by the processor in the cache line of memory.
16. The article of claim 15 , wherein the application is a secure application.
17. The article of claim 15 , wherein the tweak is an XEX encryption mode with tweak and ciphertext stealing (XTS)-Advanced Encryption Standard (AES) tweak.
18. The article of claim 15 , wherein the tweak is a LRW tweak.
19. A system comprising:
a mass storage device to store an application; and
a processor comprising:
a plurality of counters each counter associated with one of a plurality of MAC cache lines in an external memory; and
logic, the logic to generate a message-authentication code (MAC) for a block of data associated with the application stored in the external memory, the logic to encrypt the MAC, the MAC encrypted using a tweak, the tweak including a cache line identifier for the MAC cache line to store the MAC and a timestamp value read from the counter associated with the MAC cache line, the logic to store the block of data in a cache line of the external memory and to store the MAC in a MAC cache line in the external memory.
20. The system of claim 19 , wherein the tweak is an XEX encryption mode with tweak and ciphertext stealing (XTS)-Advanced Encryption Standard (AES) tweak.