Contact structure of semiconductor device
A method of fabricating a semiconductor device comprises epitaxially-growing a strained material in a cavity of a substrate comprising a major surface and the cavity, the cavity being below the major surface. A lattice constant of the strained material is different from a lattice constant of the substrate. The method also comprises forming a first metal layer over the strained material, and forming a dielectric layer over the first metal layer, wherein the dielectric layer has a thickness ranging from 1 nm to 10 nm. The method further comprises forming a dummy poly-silicon over the dielectric layer, and forming an interlayered dielectric layer (ILD) surrounding the dummy poly-silicon. The method additionally comprises removing the dummy poly-silicon over the dielectric layer, and forming a second metal layer over the dielectric layer.
1. A method of forming a contact structure for a semiconductor device, the method comprising:
epitaxially-growing a strained material in a cavity of a substrate comprising a major surface and the cavity, the cavity being below the major surface, wherein a lattice constant of the strained material is different from a lattice constant of the substrate, and the strained material extends upward over the major surface of the substrate;
forming a first metal layer over the strained material;
forming a dielectric layer over the first metal layer, wherein the dielectric layer has a thickness ranging from 1 nm to 10 nm; and
forming a second metal layer over the dielectric layer.
2. The method of claim 1 , wherein the step of forming a first metal layer over the strained material is performed by CVD, ALD, or sputtering.
3. The method of claim 1 , wherein the step of forming a dielectric layer over the first metal layer is performed by CVD, ALD or sputtering.
4. The method of claim 1 , wherein the strained material comprises SiGe, SiC, or SiP.
5. The method of claim 1 , wherein the first metal layer comprises TiN or TaN.
6. The method of claim 1 , wherein forming the dielectric layer comprises forming the dielectric layer comprising TiO 2 , Al 2 O 3 , NiO, or HfO 2 .
7. The method of claim 1 , wherein forming the second metal layer comprises forming the second metal layer comprising Al, Cu, Ni, NiPt, Pt, Ti, TiAlN, TiCN, TaN, TaCN, WN, or WCN.
8. The method of claim 1 , wherein epitaxially-growing the strained material in the cavity of the substrate comprises growing the strained material comprising a dislocation.
9. The method of claim 1 , wherein epitaxially-growing the strained material in the cavity of the substrate comprises using a LPCVD process at a temperature ranging from about 400 degrees Celsius to 800 degrees Celsius.
10. The method of claim 9 , wherein the LPCVD process is performed at a pressure ranging from about 1 Torr to 15 Torr.
11. The method of claim 10 , wherein the pressure is caused using a reaction gas comprising SiH 2 Cl 2 , HCl, GeH 4 , B 2 H 6 , and H 2 .
12. A method of forming a metal oxide semiconductor field effect transistor (MOSFET), the method comprising:
forming a gate stack on a major surface of a substrate, the substrate comprising the major surface and a cavity, the cavity having a bottom surface lower than the major surface;
forming a shallow trench isolation (STI) region within the substrate, the cavity being between the STI region and the gate stack; and
forming a contact structure, at least partially in the cavity, wherein forming the contact structure comprises:
epitaxially-growing a strained material in the cavity, wherein a lattice constant of the strained material is different from a lattice constant of the substrate, and the strained material extends upward over the major surface of the substrate;
forming a first metal layer over the strained material;
forming a dielectric layer over the first metal layer, wherein the dielectric layer has a thickness ranging from 1 nm to 10 nm; and
forming a second metal layer over the dielectric layer.
13. The method of claim 12 , wherein the step of forming a first metal layer over the strained material is performed by CVD, ALD, or sputtering.
14. The method of claim 12 , wherein the step of forming a dielectric layer over the first metal layer is performed by CVD, ALD or sputtering.
15. The method of claim 12 , wherein the strained material comprises SiGe, SiC, or SiP.
16. The method of claim 12 , wherein the first metal layer comprises TiN or TaN.
17. The method of claim 12 , wherein forming the second metal layer comprises forming the second metal layer comprising Al, Cu, Ni, NiPt, Pt, Ti, TiAlN, TiCN, TaN, TaCN, WN, or WCN.
18. The method of claim 12 , wherein epitaxially-growing the strained material in the cavity of the substrate comprises using a LPCVD process at a pressure ranging from about 1 Torr to 15 Torr.
19. The method of claim 18 , wherein LPCVD process uses a reaction gas comprising SiH 2 Cl 2 and HCl.
20. The method of claim 19 , wherein a mass flow rate of SiH 2 Cl 2 to a mass flow rate of HCl ranges from 0.45 to 0.55.