IP Library Granted Patent US 9,083,257
Granted Patent B2
US 9,083,257 · App. 13/563,297 · Granted Jul 14, 2015

Power conversion circuit, multiphase voltage regulator, and power conversion method

Inventors: Koji Tateno (Kanagawa, JP); Takahiro Nomiyama (Kanagawa, JP); Yoshinao Miura (Kanagawa, JP); Hideo Ishii (Kanagawa, JP)
Assignee: RENESAS ELECTRONICS CORPORATION
H02M1/38H02M3/1588Y02B70/1466
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Quick Facts
Patent No.
US 9,083,257
App. No.
13/563,297
Granted
Jul 14, 2015
Kind
B2
Abstract

Disclosed is a power conversion circuit that suppresses the flow of a through current to a switching element based on a normally-on transistor. The power conversion circuit includes a high-side transistor and a low-side transistor, which are series-coupled to each other to form a half-bridge circuit, and two drive circuits, which complementarily drive the gate of the high-side transistor and of the low-side transistor. The high-side transistor is a normally-off transistor. The low-side transistor is a normally-on transistor.

Claims (56)

1. A power conversion circuit comprising:

a normally-off, high-side transistor and a normally-on, low-side transistor that are series-coupled to each other to form a half-bridge circuit;

a first drive circuit which drives a gate of the high-side transistor; and

a second drive circuit which drives a gate of the low-side transistor,

wherein the first drive circuit controls switching of the high-side transistor in accordance with an input pulse width modulation (PWM) signal when a first power supply voltage for the second drive circuit is lower than a first reference voltage, and the first drive circuit turns off the high-side transistor when the first power supply voltage for the second drive circuit is higher than the first reference voltage, and

wherein the second drive circuit outputs a drive signal to the gate of the low-side transistor in accordance with the first power supply voltage, which is supplied as a low-potential power supply voltage.

2. The power conversion circuit according to claim 1 , further comprising:

a negative voltage source that generates the first power supply voltage in accordance with a second power supply voltage and a ground voltage.

3. The power conversion circuit according to claim 1 , further comprising:

a control circuit which outputs a first logic level when the first power supply voltage is lower than the first reference voltage, and outputs a second logic level when the first power supply voltage is higher than the first reference voltage, and

wherein the first drive circuit supplies a drive signal to the gate of the high-side transistor in accordance with the second logic level, which is output from the control circuit, and turns off the high-side transistor.

4. The power conversion circuit according to claim 1 ,

wherein the first drive circuit outputs a drive signal to the gate of the high-side transistor in accordance with a second power supply voltage for the first drive circuit, which is supplied as a high-potential power supply voltage, and

wherein the first drive circuit turns off the high-side transistor when the second power supply voltage is lower than a second reference voltage.

5. The power conversion circuit according to claim 4 , further comprising:

a control circuit which outputs a first logic level when the second power supply voltage is higher than a second reference voltage, and outputs a second logic level when the first power supply voltage is higher than the second reference voltage, and

wherein the first drive circuit supplies a drive signal to the gate of the high-side transistor in accordance with the second logic level, which is output from the control circuit, and turns off the high-side transistor.

6. The power conversion circuit according to claim 1 ,

wherein the second drive circuit controls the switching operation of the low-side transistor in accordance with the input PWM signal when a second power supply voltage for the first drive circuit is higher than a second reference voltage, and the second drive circuit turns off the low-side transistor when the second power supply voltage is lower than the second reference voltage.

7. The power conversion circuit according to claim 6 ,

wherein the second drive circuit outputs a drive signal to the gate of the low-side transistor in accordance with the first power supply voltage, and

wherein the second drive circuit turns off the low-side transistor when the first power supply voltage is higher than the first reference voltage.

8. The power conversion circuit according to claim 7 , further comprising:

a control circuit which outputs a first logic level when the first power supply voltage is lower than the first reference voltage, and outputs a second logic level when the first power supply voltage is higher than the first reference voltage,

wherein the first drive circuit supplies a drive signal to the gate of the high-side transistor in accordance with the second logic level, which is output from the control circuit, and turns off the high-side transistor, and

wherein the second drive circuit supplies a drive signal to the gate of the low-side transistor in accordance with the second logic level, which is output from the control circuit, and turns off the low-side transistor.

9. The power conversion circuit according to claim 6 ,

wherein the first drive circuit outputs a drive signal to the gate of the high-side transistor in accordance with the second power supply voltage supplied as a high-potential power supply voltage, and

wherein, when the second power supply voltage is lower than the second reference voltage, the first drive circuit turns off the high-side transistor; and

wherein the second drive circuit turns off the low-side transistor when the second power supply voltage is lower than the second reference voltage.

10. The power conversion circuit according to claim 9 , further comprising:

a control circuit which outputs a first logic level when the second power supply voltage is higher than the second reference voltage, and outputs a second logic level when the first power supply voltage is higher than the second reference voltage,

wherein the first drive circuit supplies a drive signal to the gate of the high-side transistor in accordance with the second logic level, which is output from the control circuit, and turns off the high-side transistor, and

wherein the second drive circuit supplies a drive signal to the gate of the low-side transistor in accordance with the second logic level, which is output from the control circuit, and turns off the low-side transistor.

11. The power conversion circuit according to claim 10 , wherein the control circuit controls the operation of the second drive circuit using a signal level-shifted to the operating voltage range of the second drive circuit.

12. The power conversion circuit according to claim 1 , wherein the high-side transistor and the low-side transistor are n-channel GaN power transistors.

13. The power conversion circuit according to claim 1 , wherein the high-side transistor, the low-side transistor, and the two drive circuits are resin-sealed to form a single semiconductor device.

14. A multiphase voltage regulator comprising:

a plurality of power conversion circuits; and

a power supply controller that outputs a plurality of pulse width modulation (PWM) signals to the power conversion circuits,

wherein the power conversion circuits are parallel-coupled to a load through a plurality of output coils, and

wherein each of the power conversion circuits comprises:

a normally-off, high-side transistor and a normally-on, low-side transistor that are series-coupled to each other to form a half-bridge circuit;

a first drive circuit which drives a gate of the high-side transistor; and

a second drive circuit which drives a gate of the low-side transistor,

wherein the first drive circuit controls switching of the high-side transistor in accordance with one of the PWM signals when a first power supply voltage for the second drive circuit is lower than a first reference voltage, and the first drive circuit turns off the high-side transistor when the first power supply voltage for the second drive circuit is higher than the first reference voltage, and

wherein the second drive circuit outputs a drive signal to the gate of the low-side transistor in accordance with the first power supply voltage, which is supplied as a low-potential power supply voltage.

15. A power conversion method comprising the steps of:

providing a normally-off, high-side transistor and a normally-on, low-side transistor that are series-coupled to each other to form a half-bridge circuit, a first drive circuit which drives a gate of the high-side transistor, and a second drive circuit which drives a gate of the low-side transistor;

when a first power supply voltage for the second drive circuit is lower than a first reference voltage, the first drive circuit controls switching of the high-side transistor in accordance with an input pulse width modulation (PWM) signal; and

when the first power supply voltage for the second drive circuit is higher than the first reference voltage, the first drive circuit turns off the high-side transistor,

wherein the second drive circuit outputs a drive signal to the gate of the low-side transistor in accordance with the first power supply voltage, which is supplied as a low-potential power supply voltage.

16. The power conversion method according to claim 15 , further comprising the steps of:

when a second power supply voltage for the first drive circuit is lower than a second reference voltage, the first drive circuit turns off the high-side transistor and the second drive circuit turns off the low-side transistor; and

when the second power supply voltage for the first drive circuit is higher than the second reference voltage, the second drive circuit controlls the switching operation of the low-side transistor in accordance with the input PWM signal,

wherein the second power supply voltage is supplied as a high-potential power supply voltage.

Assignments (2)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 31, 2012
From: TATENO, KOJI; NOMIYAMA, TAKAHIRO; MIURA, YOSHINAO; ISHII, HIDEO
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 028690/0433 →
Priority Claims (1)
JP 2011-207777 · Sep 22, 2011 · national
Continuity (1)
Related Publication 20130076322A1 · Mar 28, 2013