Solid-state imaging device and camera system
A solid-state imaging device includes a pixel array with unit pixels each having a photoelectric conversion device arranged in a matrix. Column signal lines are wired with respect to one column in the pixel arrangement and pixels are regularly connected to the column signal lines in accordance with rows in which pixels are positioned. A pixel signal reading unit has a column processing unit that reads pixel signals in units of plural pixels from the pixel array and performs column processing to read signals on a column basis, wherein the pixel signal reading unit includes a column input unit which can connect one or plural column signal lines arranged at a corresponding column to an input of one column processing unit through plural capacitors connected in parallel The column input unit has switches which can change a connection state between capacitors and column signal lines corresponding to the column.
1. A solid-state imaging device comprising:
a pixel array unit;
a column processing unit configured to have at least two memories, a comparator and a counter on respective column signal lines; and
a reference signal generating unit configured to generate a reference signal,
wherein the at least two memories are connected to the comparator and at least one of the at least two memories is connected to the reference signal generating unit.
2. The solid-state imaging device according to claim 1 , further comprising:
a column input unit configured to connect at least one of the column signal lines arranged at a corresponding column to an input of a column processing unit through plural memories connected in parallel.
3. The solid-state imaging device according to claim 2 ,
wherein the column input unit has switches configured to change a connection state between plural memories and plural column signal lines corresponding to a given column.
4. The solid-state imaging device according to claim 3 , wherein the switches are configured to be selectively turned on or off at a time of reading all pixels of the pixel array unit.
5. The solid-state imaging device according to claim 3 , wherein the switches are configured to be selectively turned on or off at a time of reading pixels of the pixel array unit according to pixel addition.
6. The solid-state imaging device according to claim 1 , wherein
the at least two memories includes two, four, or eight memories, and
half of the at least two memories are connected to the reference signal generating unit.
7. The solid-state imaging device according to claim 1 , wherein the column processing unit includes:
an upper column processing unit configured to have at least two upper memories, an upper comparator, and an upper counter on respective column signal lines, and
a lower column processing unit configured to have at least two lower memories, a lower comparator, and a lower counter on respective column signal lines.
8. The solid-state imaging device according to claim 7 , wherein
the at least two upper memories are connected to the upper comparator and at least one of the at least two upper memories is connected to the reference signal generating unit, and
the at least two lower memories are connected to the lower comparator and at least one of the at least two lower memories is connected to the reference signal generating unit.
9. A camera system comprising:
a solid-state imaging device, and
an optical system configured to form an object image on the solid-state imaging device,
wherein the solid-state imaging device includes
a pixel array unit;
a column processing unit configured to have at least two memories, a comparator and a counter on respective column signal lines; and
a reference signal generating unit configured to generate a reference signal,
wherein the at least two memories are connected to the comparator and at least one of the at least two memories is connected to the reference signal generating unit.
10. The camera system according to claim 9 , further comprising:
a column input unit configured to connect at least one of the column signal lines arranged at a corresponding column to an input of the column processing unit through plural memories connected in parallel.
11. The camera system according to claim 10 ,
wherein the column input unit has switches configured to change a connection state between plural memories and plural column signal lines corresponding to a given column.
12. The camera system according to claim 11 , wherein the switches are configured to be selectively turned on or off at a time of reading all pixels of the pixel array unit.
13. The camera system according to claim 11 , wherein the switches are configured to be selectively turned on or off at a time of reading pixels of the pixel array unit according to pixel addition.
14. The s camera system according to claim 9 , wherein
the at least two memories includes two, four, or eight memories, and
half of the at least two memories are connected to the reference signal generating unit.
15. The camera system according to claim 9 , wherein the column processing unit includes:
an upper column processing unit configured to have at least two upper memories, an upper comparator, and an upper counter on respective column signal lines, and
a lower column processing unit configured to have at least two lower memories, a lower comparator, and a lower counter on respective column signal lines.
16. The camera system according to claim 15 , wherein
the at least two upper memories are connected to the upper comparator and at least one of the at least two upper memories is connected to the reference signal generating unit, and
the at least two lower memories are connected to the lower comparator and at least one of the at least two lower memories is connected to the reference signal generating unit.
17. The solid-state imaging device according to claim 1 , wherein respective ones of the at least two memories are capacitors.
18. The solid-state imaging device according to claim 1 , wherein the reference signal generating unit is a digital-to-analog converter.
19. The camera system according to claim 9 , wherein respective ones of the at least two memories are capacitors.
20. The camera system according to claim 9 , wherein the reference signal generating unit is a digital-to-analog converter.