IP Library › Granted Patent US 9,086,452
Granted Patent B2
US 9,086,452 · App. 13/572,533 · Granted Jul 21, 2015

Three-dimensional integrated circuit and method for wireless information access thereof

Inventors: Mill-Jer Wang (Hsinchu, TW); Chewn-Pu Jou (Hsinchu, TW); Ching-Nen Peng (Hsinchu, TW); Huan-Neng Chen (Hsinchu, TW); Hung-Chih Lin (Hsinchu, TW); Kuang Kai Yen (Hsinchu, TW); Hao Chen (Hsinchu, TW); Feng Wei Kuo (Hsinchu, TW); Ming-Chieh Liu (Hsinchu, TW); Tsung-Hsiung Li (Hsinchu, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
G01R31/2889G06F17/5068G01R31/3025H01L24/16H01L25/0657H01L2224/16145H01L2224/16225H01L2225/06513H01L2225/06517H01L2225/06565H01L2225/06596H01L2924/15192H01L2924/15311
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Quick Facts
Patent No.
US 9,086,452
App. No.
13/572,533
Granted
Jul 21, 2015
Kind
B2
Abstract

A three-dimensional integrated circuit (3DIC) and wireless information access methods thereof are provided. The proposed 3DIC includes a semiconductor structure, and a wireless power device (WPD) formed on the semiconductor structure for wirelessly receiving a power for operating a function selected from a group consisting of probing the semiconductor structure, testing the semiconductor structure and accessing a first information from the semiconductor structure.

Claims (67)

1. A method for wireless information access in a three-dimensional integrated circuit (3DIC), comprising steps of:

providing a set of stacked chips, the set of stacked chips including a wireless device and a transmitting/receiving circuit; and

accessing wirelessly information stored in the set of stacked chips via the wireless device and the transmitting/receiving circuit during performing a packaging process for the set of stacked chips,

wherein the set of stacked chips comprises:

a first chip embedded with the wireless device, the wireless device being a wireless power transfer (WPT) device; and

a second chip embedded with the transmitting/receiving circuit, the transmitting/receiving circuit being a tag, and the tag comprising:

an RF/analog front end;

a digital controller; and

a non-volatile memory.

2. The method according to claim 1 , wherein

the 3DIC further comprises a substrate;

the set of stacked chips further comprises:

one or more other WPTs; and

one or more other tags; and

the method further comprises accessing wirelessly another information stored in the set of stacked chips via at least one of the one or more other tags coupled with a corresponding one of the one or more WPTs, and the at least one of the one or more other WPTs is embedded in the substrate.

3. The method according to claim 2 , further comprising accessing wirelessly additional information stored in the set of stacked chips via at least one of the one or more other tags coupled with the WPT device, wherein the WPT device is connected to the tag and the at least one of the one or more other tags.

4. The method according to claim 1 , further comprising:

accessing wirelessly additional information stored in the set of stacked chips via another tag.

5. The method according to claim 4 , wherein the accessing wirelessly the additional information is performed via the WPT device coupled with the another tag.

6. The method according to claim 4 , wherein the accessing wirelessly the additional information is performed via another WPT device coupled with the another tag, the another WPT device being embedded in the set of stacked chips or a substrate of the 3DIC.

7. A three-dimensional integrated circuit (3DIC), comprising:

a semiconductor structure, comprising a set of stacked chips; and

a wireless power device (WPD) embedded in the semiconductor structure for wirelessly receiving a power for operating a function selected from a group consisting of probing the semiconductor structure, testing the semiconductor structure, and accessing first information stored in the set of stacked chips,

wherein

the set of stacked chips embedded with the WPD and a transmitting/receiving circuit, the WPD being a first wireless power transfer (WPT) device, the transmitting/receiving circuit being a first tag, and the first tag comprising:

an RF/analog front end;

a digital controller; and

a non-volatile memory; and

the first WPT device and the first tag are in two different chips of the set of stacked chips.

8. The 3DIC of claim 7 , wherein

the RF/analog circuit electrically coupled with the first WPT device;

the digital controller coupled with the RF/analog front end; and

the non-volatile memory coupled with the digital controller.

9. The 3DIC of claim 7 , further comprising a second WPT device electrically coupled with the first tag, the second WPT device being embedded in a substrate of the semiconductor structure.

10. The 3DIC of claim 7 , wherein

the first WPT device is embedded in a first chip of the set of stacked chips;

the first tag is embedded in a second chip of the set of stacked chips; and

the 3DIC further comprises a second WPT device embedded in the second chip of the set of stacked chips and electrically coupled with the first WPT device.

11. The 3DIC of claim 7 , wherein

the first WPT device is embedded in a first chip of the set of stacked chips;

the first tag is embedded in a second chip of the set of stacked chips; and

the 3DIC further comprises a second tag embedded in the first chip and electrically coupled with the first WPT device.

12. The 3DIC of claim 7 , wherein

the first WPT device is embedded in a first chip of the set of stacked chips;

the first tag is embedded in the first chip of the set of stacked chips; and

the 3DIC further comprises a second tag embedded in the first chip and electrically coupled with the first WPT device.

13. The 3DIC of claim 7 , further comprising a second tag embedded in the set of stacked chips and electrically coupled with the first WPT device.

14. A method of accessing a three-dimensional integrated circuit (3DIC), the 3DIC comprising a substrate and a set of stacked chips over the substrate, the set of stacked chips comprising a first chip and a second chip electrically coupled with each other, and the method comprising:

receiving an electromagnetic signal by a first wireless power transfer (WPT) device of the 3DIC;

based on operation of a first tag in the first chip and in response to an instruction extracted from the electromagnetic signal, accessing first information contained in the set of stacked chips, wherein the first WPT device is embedded in the second chip or is embedded in the substrate of the 3DIC.

15. The method of claim 14 , further comprising:

storing, into the first chip, a result of a known good die (KGD) test performed on the first chip.

16. The method of claim 14 , wherein the accessing the first information is performed during a stacking process of forming the set of stacked chips of the 3DIC.

17. The method of claim 14 , wherein

the first WPT device is embedded in the substrate of the 3DIC; and

the method further comprises:

transmitting the electromagnetic signal to the first tag through an interconnection structure embedded in the substrate of the 3DIC.

18. The method of claim 14 , wherein

the first WPT device embedded in the second chip of the 3DIC; and

the method further comprises:

transmitting the electromagnetic signal to the first tag without going through the substrate of the 3DIC.

19. The method of claim 14 , further comprising a second WPT device, wherein

the second WPT device is embedded in the first chip; and

the method further comprises:

transmitting the electromagnetic signal to the tag through an interconnection structure embedded in the substrate of the 3DIC.

20. The method of claim 14 , further comprising:

accessing, by operating a second tag of the 3DIC, second information contained in the set of stacked chips in response to the instruction extracted from the electromagnetic signal, the second tag being configured to receive the electromagnetic signal through the first WPT device, and the second tag being embedded in the second chip.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 14, 2012
From: WANG, MILL-JER; JOU, CHEWN-PU; PENG, CHING-NEN; CHEN, HUAN-NENG; LIN, HUNG-CHIH; YEN, KUANG KAI; CHEN, HAO; KUO, FENG WEI; LIU, MING-CHIEH; LI, TSUNG-HSIUNG
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 028786/0665 →
Continuity (1)
Related Publication 20140043148A1 · Feb 13, 2014