IP Library Granted Patent US 9,086,708
Granted Patent B2
US 9,086,708 · App. 13/794,231 · Granted Jul 21, 2015

High slew rate switching regulator circuits and methods

Inventors: David Christian Gerard Tournatory (San Carlos, CA); Kevin Kennedy Johnstone (Mountain View, CA)
Assignee: Gazelle Semiconductor Inc.
G05F1/12H02J3/00H02J3/12H02M3/00H02M3/158H02M2003/1566
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Quick Facts
Patent No.
US 9,086,708
App. No.
13/794,231
Granted
Jul 21, 2015
Kind
B2
Abstract

Embodiments of the disclosure include high slew rate switching regulator circuits and methods. In one embodiment, switching regulators are coupled to an output node. A first switching regulator may drive the output node. A second switching regulator may drive the output node through a capacitor. Control circuitry may include feedback inputs to maintain a first voltage on the output of the first switching regulator on one terminal of the capacitor and further to maintain a second voltage on the output of the second switching regulator on the other terminal of the capacitor.

Claims (44)

1. An apparatus comprising:

a first switching regulator coupled to an output node;

a second switching regulator coupled to the output node through a capacitor, wherein the capacitor comprises

a first terminal coupled to the output node, and

a second terminal coupled to the second switching regulator; and

a controller configured to regulate a voltage on the output node, wherein the controller comprises

a first feedback input coupled to the first terminal of the capacitor, and

a second feedback input coupled to the second terminal of the capacitor;

wherein the controller is further configured to regulate a voltage on the second terminal of the capacitor,

wherein the first switching regulator is configured to produce a first current slew rate and the second switching regulator is configured to produce a second current slew rate, and wherein the first current slew rate is different than the second current slew rate.

2. The apparatus of claim 1 , wherein the regulated voltage on the second terminal of the capacitor is equal to a difference between an input voltage and the regulated voltage on the output node.

3. The apparatus of claim 1 :

wherein the first switching regulator produces a first current through a first inductor in response to a change in a reference signal; and

the second switching regulator produces the second current through a second inductor in response to the change in the reference signal.

4. The apparatus of claim 1 :

wherein the first switching regulator produces the first current through a first inductor in response to a change in a load current; and

the second switching regulator produces the second current through a second inductor in response to the change in the load current.

5. The apparatus of claim 1 , wherein the first switching regulator generates a first capacitor recharge current and the second switching regulator generates a second capacitor recharge current, wherein a sum of the first capacitor recharge current and the second capacitor recharge current is approximately zero.

6. The apparatus of claim 1 , wherein a first input voltage to the first switching regulator is equal to a second input voltage to the second switching regulator.

7. The apparatus of claim 1 , wherein the first current slew rate corresponds to a rate of change in a first current through a first inductor and the second current slew rate corresponds to a rate of change in a second current through a second inductor.

8. The apparatus of claim 1 , wherein a duty cycle of a first inductor in the first switching regulator is controlled independently of a duty cycle of a second inductor in the second switching regulator.

9. The apparatus of claim 1 , wherein the second switching regulator has a negative current slew rate that is greater than a negative current slew rate of the first switching regulator.

10. The apparatus of claim 1 , wherein the first switching regulator has a positive current slew rate that is greater than a positive current slew rate of the second switching regulator.

11. A method comprising:

receiving a first input voltage in a first switching regulator;

receiving a second input voltage in a second switching regulator; and

controlling the first switching regulator to produce a first current through a first inductor and controlling the second switching regulator to produce a second current through a second inductor and a capacitor to maintain a first regulated voltage on an output node and a second regulated voltage between the second inductor and the capacitor,

wherein the first switching regulator is configured to produce a first current slew rate and the second switching regulator is configured to produce a second current slew rate, and wherein the first current slew rate is different than the second current slew rate.

12. The method of claim 11 , wherein the first input voltage is equal to the second input voltage, and wherein the second regulated voltage is equal to a difference between the first input voltage and the first regulated voltage.

13. The method of claim 11 :

wherein the first switching regulator produces the first current in response to a change in a reference signal; and

the second switching regulator produces the second current in response to the change in the reference signal.

14. The method of claim 11 :

wherein the first switching regulator produces the first current in response to a change in a load current; and

the second switching regulator produces the second current in response to the change in the load current.

15. The method of claim 11 , further comprising:

controlling the first switching regulator to generate a first capacitor recharge current; and

controlling the second switching regulator to generate a second capacitor recharge current;

wherein a sum of the first capacitor recharge current and the second capacitor recharge current is approximately zero.

16. The method of claim 11 , wherein the second switching regulator has a negative current slew rate that is greater than a negative current slew rate of the first switching regulator.

17. The method of claim 11 , wherein the first switching regulator is coupled to a load at the output node, and wherein the second switching regulator is coupled to the load through the capacitor.

18. The method of claim 11 , wherein the first current slew rate corresponds to a rate of change in the first current through the first inductor and the second current slew rate corresponds to a rate of change in the second current through the second inductor.

19. The method of claim 11 , wherein a duty cycle of the first inductor is controlled independently of a duty cycle of the second inductor.

20. The method of claim 11 , wherein the first switching regulator has a positive current slew rate that is greater than a positive current slew rate of the second switching regulator.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2013
From: TOURNATORY, DAVID CHRISTIAN GERARD
To: GAZELLE SEMICONDUCTOR, INC.
Reel/Frame 030121/0896 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 14, 2013
From: JOHNSTONE, KEVIN
To: TOURNATORY, DAVID
Reel/Frame 029996/0911 →
Continuity (2)
Provisional Application 61747988 · Dec 31, 2012
Related Publication 20140184177A1 · Jul 3, 2014