Semiconductor device, solid-state image sensor and camera system for reducing the influence of noise at a connection between chips
The present invention relates to a semiconductor device, a solid-state image sensor and a camera system capable of reducing the influence of noise at a connection between chips without a special circuit for communication and reducing the cost as a result. The semiconductor device includes: a first chip 11 ; and a second chip 12 , wherein the first chip 11 and the second chip 12 are bonded to have a stacked structure, the first chip 11 has a high-voltage transistor circuit mounted thereon, the second chip 12 has mounted thereon a low-voltage transistor circuit having lower breakdown voltage than the high-voltage transistor circuit, and wiring between the first chip and the second chip is connected through a via formed in the first chip.
1. A solid-state image sensor comprising:
a pixel unit in which a plurality of pixels are arranged in a matrix, each pixel of the plurality of pixels configured to perform photoelectric conversion;
a pixel signal readout circuit configured to read out pixel signals from the pixel unit, wherein the pixel signal readout circuit includes:
a plurality of comparators arranged in association with a column arrangement of the plurality of pixels, each comparator of the plurality of comparators configured to compare a readout signal potential and a reference voltage and output a determination signal based on the comparison; and
a plurality of counters controlled by outputs from the plurality of comparators, each counter of the plurality of counters configured to count a comparison time of an associated comparator;
a first substrate; and
a second substrate, wherein
the first substrate and the second substrate are bonded to have a stacked structure,
the first substrate has mounted thereon at least the pixel unit and the plurality of comparators of the pixel signal readout circuit,
the first substrate includes one or more power supply ports and one or more signal ports located at corners of a circuit block mounted thereon,
the first substrate includes a power supply via and a signal via formed therein,
power supply wiring is connected to the power supply via and to the one or more power supply ports of the circuit block,
the second substrate has mounted thereon at least the plurality of counters of the pixel signal readout circuit and a reference signal supply unit configured to generate a reference voltage and supply the reference voltage to the plurality of comparators, and
wiring between the first substrate and the second substrate is connected through a via formed in the first substrate.
2. The solid-state image sensor according to claim 1 , wherein
the first substrate has mounted thereon an analog circuit, and
the second substrate has mounted thereon a digital circuit.
3. The solid-state image sensor according to claim 1 , wherein
the second substrate has mounted thereon a bonding pad and an input/output circuit, and
the first substrate has an opening formed therein for wire bonding on the second substrate around the pixel unit.
4. The solid-state image sensor according to claim 1 , wherein signal vias and power supply vias are arranged near corners of the circuit block.
5. The solid state image sensor according to claim 4 , wherein signal wiring is connected to a signal via near the corner of the circuit block of the first substrate.
6. The image sensor according to claim 1 , wherein the second substrate further includes a timing control circuit configured to generate clock signals.
7. The image sensor according to claim 6 , wherein the second substrate further includes a vertical drive circuit and a horizontal scanning circuit.
8. The image sensor according to claim 1 , wherein power is supplied to the first substrate via the second substrate.
9. A camera system comprising:
a solid-state image sensor; and
an optical system that forms a subject image on an image sensor, wherein
the solid-state image sensor includes:
a pixel unit in which a plurality of pixels are arranged in a matrix, each pixel of the plurality of pixels configured to perform photoelectric conversion;
a pixel signal readout circuit configured to read out pixel signals from the pixel unit, wherein the pixel signal readout circuit includes:
a plurality of comparators arranged in association with a column arrangement of the plurality of pixels, each comparator of the plurality of comparators configured to compare a readout signal potential and a reference voltage and output a determination signal based on the comparison; and
a plurality of counters controlled by outputs from the plurality of comparators, each counter of the plurality of counters configured to count a comparison time of an associated comparator;
a first substrate; and
a second substrate, wherein
the first substrate and the second substrate are bonded to have a stacked structure,
the first substrate has mounted thereon at least the pixel unit and the plurality of comparators of the pixel signal readout circuit,
the first substrate includes one or more power supply ports and one or more signal ports located at corners of a circuit block mounted thereon,
the first substrate includes a power supply via and a signal via formed therein,
power supply wiring is connected to the power supply via and to the one or more power supply ports of the circuit block,
the second substrate has mounted thereon at least the plurality of counters of the pixel signal readout circuit and a reference signal supply unit configured to generate a reference voltage and supply the reference voltage to the plurality of comparators, and
wiring between the first substrate and the second substrate is connected through a via formed in the first substrate.
10. The camera system according to claim 9 , wherein
the first substrate has mounted thereon an analog circuit, and
the second substrate has mounted thereon a digital circuit.
11. The camera system according to claim 9 , wherein
the second substrate has mounted thereon a bonding pad and an input/output circuit, and
the first substrate has an opening formed therein for wire bonding on the second substrate around the pixel unit.
12. The camera system according to claim 9 , wherein signal vias and power supply vias are arranged near the corners of the circuit block.
13. The camera system according to claim 12 , wherein signal wiring is connected to a signal via near the corner of the circuit block of the first substrate.
14. The camera system according to claim 13 , wherein the second substrate further includes a vertical drive circuit and a horizontal scanning circuit.
15. The camera system according to claim 9 , wherein the second substrate further includes a timing control circuit configured to generate clock signals.
16. The camera system according to claim 9 , wherein power is supplied to the first substrate via the second substrate.