IP Library › Granted Patent US 9,098,097
Granted Patent B2
US 9,098,097 · App. 14/079,512 · Granted Aug 4, 2015

System and method for remote temperature sensing with routing resistance compensation

Inventors: Aswani Aditya Kumar Tadinada (New Delhi, IN); Tanmoy Sen (Noida, IN)
Assignee: STMicroelectronics International N.V.
G05F5/00
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Quick Facts
Patent No.
US 9,098,097
App. No.
14/079,512
Granted
Aug 4, 2015
Kind
B2
Abstract

An integrated circuit die includes multiple temperature sensor units each for measuring the temperature of respective regions of a semiconductor substrate of the integrated circuit die. The temperature sensor units are each coupled to a multiplexer by respective groups of signal lines. The signal lines include resistance compensation areas for maintaining a particular ratio of resistances of the signal lines of each group.

Claims (51)

1. An integrated circuit die comprising:

a controller including:

an analog-to-digital converter having an input;

a bandgap voltage generator coupled to the input of the analog-to-digital converter and configured to provide a bandgap voltage to the analog-to-digital converter;

a first input coupled to the bandgap voltage generator;

a second input coupled to the bandgap voltage generator;

a multiplexer coupled to the controller;

a plurality of temperature sensor units;

a plurality of groups of conductive signal lines, each group of conductive signal lines electrically connecting a respective one of the temperature sensor units to the multiplexer, each group of conductive signal lines including:

a respective first signal line;

a respective second signal line; and

a respective plurality of resistance compensation areas in which a length of the first signal line is extended with respect to a length of the second signal line, the multiplexer configured to selectively electrically couple a respective one of the groups of conductive signal lines to the first and second inputs of the controller.

2. The integrated circuit die of claim 1 wherein a ratio of the length of the first signal line to the length of the second signal line is approximately equal for each respective group of conductive signal lines.

3. The integrated circuit die of claim 1 wherein each group of conductive signal lines includes a respective third conductive signal line.

4. The integrated circuit die of claim 1 wherein the bandgap voltage generator is configured to receive a signal from a respective one of the temperature sensor units via the multiplexer and to generate the bandgap voltage.

5. The integrated circuit die of claim 1 wherein the analog-to-digital converter is configured to receive the bandgap voltage from the bandgap voltage generator and output a digital signal indicative of a temperature of the respective temperature sensor unit.

6. The integrated circuit die of claim 5 wherein each temperature sensor unit includes a respective pair of bipolar transistors.

7. The integrated circuit die of claim 1 wherein each temperature sensor unit outputs a temperature signal on the respective group of conductive signal lines indicative of a temperature of a respective region of the integrated circuit die.

8. An integrated circuit die comprising:

a semiconductor substrate;

a first temperature sensor in a first region of the integrated circuit die;

a second temperature sensor in a second region of the integrated circuit die;

a multiplexer;

a first signal line having a first length;

a second signal line having a second length, the first and second signal lines electrically connecting the first temperature sensor to the multiplexer;

a third signal line having a third length;

a fourth signal line having a fourth length, the third and fourth signal lines electrically connecting the second temperature sensor to the multiplexer, a ratio of the first length to the second length being approximately equal to a ratio of the third length to the fourth length;

a controller coupled to the multiplexer, the multiplexer configured to selectively couple the first and the second signal lines to the controller or the third and the fourth signal lines to the controller, the controller configured to calculate a respective temperature value for each of the first and second temperature sensors.

9. The integrated circuit die of claim 8 wherein the controller comprises:

a voltage generator configured to generate a first voltage corresponding to a temperature of the first temperature sensor and to generate a second voltage corresponding to a temperature of the second temperature sensor; and

an analog-to-digital converter coupled to the voltage generator and configured to receive the first voltage and the second voltage and to output a first digital signal and a second digital signal based on the first voltage and the second voltage, respectively.

10. The integrated circuit die of claim 9 wherein the voltage generator is a bandgap voltage generator, the first voltage corresponding to a bandgap of the semiconductor substrate in the first region, and the second voltage corresponding to a bandgap of the semiconductor substrate in the second region.

11. The integrated circuit die of claim 10 wherein the first and the second temperature sensors each include a respective pair of bipolar transistors.

12. The integrated circuit die of claim 11 comprising a plurality of first resistance compensation regions, a path length of the first signal line in the first resistance compensation regions being longer than a path length of the second signal line in the first resistance compensation regions.

13. The integrated circuit die of claim 12 comprising a plurality of second resistance compensation regions, a path length of the third signal line in the second resistance compensation regions being longer than a path length of the fourth signal line in the second resistance compensation regions.

14. The integrated circuit die of claim 13 wherein the first length is longer than the third length and there are more first resistance compensation regions than second resistance compensation regions.

15. A method for forming an integrated circuit die, the method comprising:

forming a first temperature sensor adjacent a first region of a semiconductor substrate;

forming a second temperature sensor adjacent a second region of the semiconductor substrate;

forming a multiplexer;

forming a first signal line having a first length;

forming a second signal line having a second length, the first and the second signal lines electrically connecting the first temperature sensor to the multiplexer;

forming a third signal line having a third length;

forming a fourth signal line having a fourth length, the third and fourth signal lines electrically connecting the second temperature sensor to the multiplexer, a ratio of the first length to the second length being approximately equal to a ratio of the third length to the fourth length; and

forming a controller coupled to the multiplexer, the multiplexer configured to selectively couple the first and the second signal lines to the controller or the third and the fourth signal lines to the controller, the controller configured to calculate a respective temperature value for each of the first and second temperature sensors.

16. The method of claim 15 wherein forming the first and second signal lines comprises forming a plurality of first resistance compensation regions, a path length of the first signal line in the first resistance compensation regions being longer than a path length of the second signal line in the first resistance compensation regions.

17. The method of claim 16 wherein forming the third and the fourth signal lines includes forming a plurality of second resistance compensation regions, a path length of the third signal line in the second resistance compensation regions being longer than a path length of the fourth signal line in the second resistance compensation regions.

18. The method of claim 15 wherein the controller comprises:

a voltage generator configured to generate a first voltage corresponding to a temperature of the first temperature sensor and to generate a second voltage corresponding to a temperature of the second temperature sensor; and

an analog to digital converter coupled to the voltage generator and configured to receive the first voltage and the second voltage and to output a first digital signal and a second digital signal based on the first voltage and the second voltage, respectively.

19. The method of claim 18 wherein the first and the second temperature sensors each include a respective pair of bipolar transistors.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 19, 2013
From: STMICROELECTRONICS PVT LTD
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 031635/0047 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 14, 2013
From: TADINADA, ASWANI ADITYA KUMAR; SEN, TANMOY
To: STMICROELECTRONICS PVT LTD
Reel/Frame 031606/0305 →
Continuity (1)
Related Publication 20150130531A1 · May 14, 2015