Low-inductance power semiconductor assembly
A low-inductive power semiconductor assembly is provided in which semiconductor switches are arranged behind one another in a main current path.
1. A power semiconductor assembly, comprising:
a circuit carrier;
a plurality of half-bridges each of which comprises a plurality of power switches, the power switches of each half-bridge being integrated in discrete semiconductor chips and connected in series directly or indirectly to a phase output of that half-bridge, the semiconductor chips of each half-bridge being arranged next to one another on the circuit carrier in a first direction, the half-bridges being arranged next to one another on the circuit carrier in a second direction perpendicular to the first direction; and
a plurality of flat conductor strips disposed above the half-bridges and electrically insulated from one another by a dielectric, the plurality of conductor strips electrically connecting the at least two half-bridges to each other;
wherein a main current direction of each half-bridge extends parallel to the second direction,
wherein a main current direction of the flat conductor strips extends parallel to the second direction.
2. The power semiconductor assembly of claim 1 , wherein each of the half bridges includes an upper bridge branch module and a lower bridge branch module arranged next to one another in the second direction, wherein each of the modules of one of the half bridges includes a subset of the semiconductor chips for that half bridge, and wherein a mutual offset of two adjacent ones of the modules in the second direction is less than 20% of the dimensions of an individual one of the modules in the second direction.
3. The power semiconductor assembly of claim 1 , wherein each of the half bridges includes an upper bridge branch module and a lower bridge branch module arranged next to one another in the second direction, wherein each of the modules of one of the half bridges includes a subset of the semiconductor chips for that half bridge, and wherein a mutual offset of two adjacent ones of the semiconductor chips in the second direction is less than a dimension of an individual one of the modules in the second direction.
4. The power semiconductor assembly of claim 1 , wherein the first direction is predetermined by a straight line.
5. The power semiconductor assembly of claim 1 , wherein the first direction is predetermined by a spatial curve located in a plane extending perpendicular to the second direction.
6. The power semiconductor assembly of claim 1 , wherein each of the half bridges includes an upper bridge branch module and a lower bridge branch module arranged next to one another in the second direction, wherein each of the modules of one of the half bridges includes a subset of the semiconductor chips for that half bridge, and wherein each of the modules has a flat carrier on which the semiconductor chips for that module are arranged.
7. The power semiconductor assembly of claim 1 , wherein the plurality of conductor strips electrically connect the half-bridges in parallel.
8. The power semiconductor assembly of claim 1 , wherein there are three half-bridges and three phase outputs, and wherein the plurality of conductor strips electrically connect the three half-bridges in parallel.