IP Library Granted Patent US 9,111,789
Granted Patent B2
US 9,111,789 · App. 14/209,066 · Granted Aug 18, 2015

Thin film transistor array panel

Inventors: Byung Su Cho (Asan-si, KR); Hyeong Tag Jeon (Seoul, KR); Jae Sang Lee (Seoul, KR)
Assignees: SAMSUNG DISPLAY CO., LTD.; IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)
H01L29/1033H01L29/7869H01L29/78669H01L29/78678
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Quick Facts
Patent No.
US 9,111,789
App. No.
14/209,066
Granted
Aug 18, 2015
Kind
B2
Abstract

A thin film transistor array panel includes: a substrate; a gate electrode disposed on the substrate; a semiconductor layer disposed on the substrate and overlapping the gate electrode; a plurality of nano particles disposed on or in the semiconductor layer; a source electrode disposed on the substrate; and a drain electrode disposed on the substrate, where the source electrode and the drain electrode are spaced apart from each other, and the semiconductor layer is disposed between the source electrode and the drain electrode, in which a diameter of each of the nano particles is in a range of about 2 nm to about 5 nm, or a ratio of a plane area of the nano particles per unit area of the semiconductor layer is in a range of about 5% to about 80%.

Claims (40)

1. A thin film transistor array panel, comprising:

a substrate;

a gate electrode disposed on the substrate;

a semiconductor layer disposed on the substrate and overlapping the gate electrode;

a plurality of nano particles disposed on or in the semiconductor layer;

a source electrode disposed on the substrate; and

a drain electrode disposed on the substrate, wherein the source electrode and the drain electrode are spaced apart from each other, and the semiconductor layer is disposed between the source electrode and the drain electrode,

wherein a diameter of each of the nano particles is about 2 nanometers to about 5 nanometers, and

wherein the nano particles are disposed on a first surface of the semiconductor layer, where a second surface of the semiconductor layer, which is opposite to the first surface, faces the gate electrode.

2. The thin film transistor array panel of claim 1 , wherein

the nano particles comprise a metal.

3. The thin film transistor array panel of claim 2 , wherein

the nano particles comprise gold (Au), silver (Ag), platinum (Pt), copper (Cu), aluminum (Al), tin (Sn), indium (In), a transition metal, a metal oxide thereof, or a combination thereof,

wherein the transition metal comprises titanium (Ti), nickel (Ni), cobalt (Co), chromium (Cr), ruthenium (Ru), molybdenum (Mo), zinc (Zn), zirconium (Zr), tungsten (W), or a combination thereof.

4. The thin film transistor array panel of claim 2 , wherein

the nano particles comprise:

a first layer comprising the metal; and

a second layer surrounding the first layer and comprising a metal oxide of the metal.

5. The thin film transistor array panel of claim 1 , wherein

the nano particles have a spherical shape, a disk type, a rod type, or a plate shape.

6. A thin film transistor array panel comprising:

a substrate;

a gate electrode disposed on the substrate;

a semiconductor layer disposed on the substrate and overlapping the gate electrode;

a plurality of nano particles disposed on or in the semiconductor layer; and

a source electrode disposed on the substrate; and

a drain electrode disposed on the substrate, wherein the source electrode and the drain electrode are spaced apart from each other, and the semiconductor layer is between the source electrode and the drain electrode,

wherein a ratio of a plane area of the nano particles per unit area of the semiconductor layer is in a range of about 5% to about 80%, and

wherein the nano particles are disposed on a first surface of the semiconductor layer, where a second surface of the semiconductor layer, which is opposite to the first surface, faces the gate electrode.

7. The thin film transistor array panel of claim 6 , wherein

the nano particles include a metal.

8. The thin film transistor array panel of claim 7 , wherein

the nano particles comprise gold (Au), silver (Ag), platinum (Pt), copper (Cu), aluminum (Al), tin (Sn), and indium (In), a transition metal, a metal oxide thereof, or a combination thereof,

wherein the transition metal comprises titanium (Ti), nickel (Ni), cobalt (Co), chromium (Cr), ruthenium (Ru), molybdenum (Mo), zinc (Zn), zirconium (Zr), tungsten (W), or a combination thereof.

9. The thin film transistor array panel of claim 7 , wherein

the nano particles comprise:

a first layer including the metal; and

a second layer surrounding the first layer and comprising a metal oxide of the metal.

10. The thin film transistor array panel of claim 6 , wherein

the nano particles have a spherical shape, a disk type, a rod type, or a plate shape.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 13, 2014
From: CHO, BYUNG SU; JEON, HYEONG TAG; LEE, JAE SANG
To: SAMSUNG DISPLAY CO., LTD.; IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)
Reel/Frame 032431/0678 →
Continuity (1)
Related Publication 20140361304A1 · Dec 11, 2014