IP Library Granted Patent US 9,113,557
Granted Patent B2
US 9,113,557 · App. 12/742,365 · Granted Aug 18, 2015

Junction box

Inventors: Iqbal Kazi (Hertfordshire, GB); Peter Comiskey (Hertfordshire, GB); Frederic Tual (Hatfield, GB)
Assignee: YAZAKI EUROPE LIMITED
H05K1/0265H05K1/0201H05K1/0204H05K1/0209H05K3/4694H05K2201/0352H05K2201/062H05K2201/09972
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Quick Facts
Patent No.
US 9,113,557
App. No.
12/742,365
Granted
Aug 18, 2015
Kind
B2
Abstract

A junction box, comprising a multi-layer circuit board, wherein the circuit board ( 6 ) comprises: a plurality of dielectric layers, each having conducting track on a side and arranged one on top of another to form the multi-layered circuit board; power circuitry ( 4 ) mounted on the circuit board; signal processing circuitry ( 5 ) mounted on the circuit board; and a power input for inputting electrical power into the circuitry on the circuit board, wherein the electrical power is transferred through conducting track ( 12 ) arranged to be on an inner dielectric layer, the conducting track on the inner dielectric layer being thicker than the conducting track arranged on the outer dielectric layers, and wherein the power circuitry is arranged on one region of the circuit board and the signal processing circuitry is arranged on another region of the circuit board, the two regions being thermally isolated by a thermal dam ( 9 ).

Claims (30)

1. A junction box, comprising a multi-layer circuit board, wherein the circuit board comprises:

a plurality of dielectric layers, each having conducting track on a side and arranged one on top of another to form the multi-layered circuit board with a plurality of inner dielectric layers and first and second outer dielectric layers along an exterior of the circuit board, wherein the conducting tracks of the respective first and second outer dielectric layers are positioned on a side of the respective first and second outer dielectric layers facing toward an interior of the circuit board and toward the plurality of inner dielectric layers;

power circuitry directly mounted on the circuit board;

signal processing circuitry directly mounted on the circuit board; and

a power input for inputting electrical power into the circuitry on the circuit board,

wherein the electrical power is transferred through a conducting track arranged to be on an inner dielectric layer, the conducting track on the inner dielectric layer being thicker than the conducting track arranged on the outer dielectric layers;

the power circuitry is arranged on a power circuitry region of the circuit board and the signal processing circuitry is arranged on a signal processing circuitry region of the circuit board;

a thermal dam including the plurality of dielectric layers, the thermal dam being positioned between the power circuitry region of the circuit board and the signal processing circuitry of the circuit board to thermally isolate the power circuitry region from the signal processing circuitry of the circuit board, electro-magnetic compatibility (EMC) performance of the circuit board is maintained by the presence of a conducting material between the two regions on the circuit board such that the thermal dam contains less than 10% of the conducting material than the power circuitry region of the circuit board; and

wherein the signal processing circuitry region has a copper coverage and the power circuitry region has a higher copper coverage than the copper coverage on the signal processing circuitry region.

2. The junction box according to claim 1 , wherein the thermal dam passes through all the layers of the circuit board.

3. The junction box according to claim 1 , wherein the thermal dam on any individual layer has a minimum width of 1 mm.

4. The junction box according to claim 3 , wherein the circuit board comprises four dielectric layers.

5. The junction box according to claim 4 , wherein the outer dielectric layers have 2 oz conducting track and the inner dielectric layers have 4 oz conducting track.

6. The junction box according to claim 1 , wherein thermal vias are provided through the multilayer printed circuit board, the vias being filled with solder.

7. The junction box according to claim 6 , wherein the solder is introduced to the vias using a reflow or wave soldering technique, or a combination of both.

8. The junction box according to claim 1 , wherein the power and signal processing circuitry on the printed circuit board comprises any of fuses, relays, MOSFETS, microcontroller and programmable elements.

9. The junction box according to claim 1 , further comprising a programmable element.

10. The junction box according to claim 1 , wherein the power input is a bus bar.

11. A junction box, comprising a multi-layer circuit board, wherein the circuit board comprises:

a plurality of dielectric layers, each having conducting track on a side and arranged one on top of another to form the multi-layered circuit board with a plurality of inner dielectric layers and first and second outer dielectric layers along an exterior of the circuit board, wherein the conducting tracks of the respective first and second outer dielectric layers are positioned on a side of the respective first and second outer dielectric layers facing toward an interior of the circuit board and toward the plurality of inner dielectric layers;

power circuitry mounted on the circuit board;

signal processing circuitry mounted on the circuit board for routing signals; and

a power input for inputting electrical power into the circuitry on the circuit board,

wherein the electrical power is transferred through conducting track arranged to be on an inner dielectric layer and the signal routing is on the conducting track on the outer dielectric layer, the conducting track on the inner dielectric layer being thicker than the conducting track arranged on the outer dielectric layers, and

wherein the power circuitry is arranged on power circuitry region of the circuit board and the signal processing circuitry is arranged on signal processing circuitry region of the circuit board;

a thermal dam including the plurality of dielectric layers, the thermal dam being positioned between the power circuitry region of the circuit board and the signal processing circuitry of the circuit board to thermally isolate the power circuitry region from the signal processing circuitry of the circuit board, and electro-magnetic compatibility (EMC) performance of the circuit board is maintained by the presence of a conducting material between the two regions on the circuit board such that the thermal dam contains less than 10% of the conducting material than the power circuitry region of the circuit board.

12. The junction box according to claim 11 , wherein the signal processing circuitry region has a copper coverage and the power circuitry region has a higher copper coverage than the copper coverage on the signal processing circuitry region.

13. The junction box according to claim 11 , wherein the thermal dam passes through all the layers of the circuit board.

14. The junction box according to claim 11 , further comprising a programmable element.

15. The junction box according to claim 11 , wherein the power input is a bus bar.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 11, 2010
From: TUAL, FREDERIC; KAZI, IQBAL; COMISKEY, PETER
To: YAZAKI EUROPE LIMITED
Reel/Frame 024367/0231 →
Priority Claims (1)
GB 0723213.5 · Nov 27, 2007 · national
Continuity (1)
Related Publication 20110061930A1 · Mar 17, 2011