IP Library Granted Patent US 9,122,116
Granted Patent B2
US 9,122,116 · App. 14/130,510 · Granted Sep 1, 2015

Active matrix substrate and display panel including the same

Inventor: Yohsuke Fujikawa (Osaka, JP)
Assignee: Sharp Kabushiki Kaisha
G02F1/136286G02F1/1345G02F2001/13629H01L27/3276
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Quick Facts
Patent No.
US 9,122,116
App. No.
14/130,510
Granted
Sep 1, 2015
Kind
B2
Abstract

An active matrix substrate includes: a display region; a non-display region around the display region; a mounting region of the non-display region; a plurality of first signal lines provided in the non-display region to extend from near the display region to the mounting region, partially spaced at a pitch Pa, partially spaced at a pitch Pb, and partially inclined at an angle θa; and a plurality of second signal lines provided in the non-display region to extend from near the display region to the mounting region, partially spaced at the pitch Pa, partially spaced at the pitch Pb, partially inclined at the angle θa, and partially inclined at an angle θb. The pitch Pd between each adjacent pair of a plurality of second connectors of the second signal lines is greater than the pitch Pc between each adjacent pair of a plurality of first connectors of the first connectors.

Claims (39)

1. An active matrix substrate comprising:

a rectangular display region configured to display an image;

a non-display region defined around the rectangular display region;

a mounting region defined in a portion of the non-display region along an edge of the display region;

a plurality of first signal lines provided in the non-display region to extend in parallel from near the display region in a direction orthogonal to the edge of the display region while being spaced at a pitch P a , then extend in parallel in a direction that intersects the edge of the display region at an angle θ a , and further extend to the mounting region in parallel in the direction orthogonal to the edge of the display region while being spaced at a pitch P b ;

a plurality of second signal lines provided in the non-display region to be adjacent to the first signal lines in a reference direction of the angle θ a , extend in parallel from near the display region in the direction orthogonal to the edge of the display region while being spaced at the pitch P a , then extend in parallel in the direction that intersects the edge of the display region at the angle θ a , subsequently extend in parallel in the direction orthogonal to the edge of the display region, further extend in parallel in a direction that intersects the edge of the display region at an angle θ b , and finally extend to the mounting region in parallel in the direction orthogonal to the edge of the display region while being spaced at the pitch P b ;

a plurality of first wiring layers forming portions of the first and second signal lines near the display region;

a plurality of second wiring layers that form portions of the first and second signal lines near the mounting region, are formed in a layer different from a layer including the first wiring layers, and are made of a material different from that of the first wiring layers;

a plurality of first connectors that are provided in the non-display region so as to be spaced at a pitch P c , and are included in the first signal lines to connect corresponding ones of the first wiring layers to corresponding ones of the second wiring layers along the direction orthogonal to the edge of the display region; and

a plurality of second connectors that are provided in the non-display region to be adjacent to the first connectors and so as to be spaced at a pitch P d greater than the pitch P c , and are included in the second signal lines to connect corresponding ones of the first wiring layers to corresponding ones of the second wiring layers along the direction orthogonal to the edge of the display region.

2. The active matrix substrate of claim 1 , wherein

the pitch P a is equal to the pitch P d , and

the pitch P b is equal to the pitch P c .

3. The active matrix substrate of claim 1 , wherein

one of the first connectors closest to the second connectors and one of the second connectors closest to the first connectors are spaced at a pitch P e , and

the pitch P e is greater than the pitch P c and less than the pitch P d .

4. The active matrix substrate of claim 1 , wherein

the first and second connectors are arranged along the edge of the display region.

5. The active matrix substrate of claim 1 , wherein

the display region includes a plurality of source signal lines extending in parallel in the direction orthogonal to the edge of the display region, and

the first and second signal lines are a plurality of video signal lines each connected through a switch circuit to some of the source signal lines that are equal in number to colors forming a pixel.

6. The active matrix substrate of claim 1 , wherein

the display region includes a plurality of display signal lines extending in parallel in the direction orthogonal to the edge of the display region, and

the first and second signal lines are each connected to a corresponding one of the display signal lines.

7. The active matrix substrate of claim 6 , wherein

the display signal lines are source signal lines.

8. The active matrix substrate of claim 1 , wherein

the mounting region is defined in a portion of the non-display region corresponding to a central portion of the edge of the display region,

the first signal lines are symmetrically placed with respect to an axis orthogonal to the central portion of the edge of the display region, and

the second signal lines are located laterally outward of the first signal lines.

9. A display panel comprising:

the active matrix substrate of claim 1 ;

a counter substrate facing the active matrix substrate; and

a display medium layer provided between the active matrix substrate and the counter substrate.

10. The display panel of claim 9 , wherein

the display medium layer is a liquid crystal layer.

11. The display panel of claim 10 , wherein

a frame-shaped sealing material is provided between the active matrix substrate and the counter substrate to enclose the liquid crystal layer, and

the first and second connectors overlap a side of the sealing material.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 2, 2014
From: FUJIKAWA, YOHSUKE
To: SHARP KABUSHIKI KAISHA
Reel/Frame 031876/0044 →
Priority Claims (1)
JP 2011-159304 · Jul 20, 2011 · national
Continuity (1)
Related Publication 20140146257A1 · May 29, 2014