Pixel structures of CMOS imaging sensors
A method is provided for fabricating a pixel structure of a CMOS transistor. The method includes providing a semiconductor substrate doped with first type doping ions; and forming a trench in the semiconductor substrate by etching the semiconductor substrate. The method also includes forming isolation layers on side surfaces of the trench to prevent dark current from laterally transferring; and forming an epitaxial layer doped with second type doping ions with a doping type opposite to a doping type of the first type doping ions in the trench. Further, the method includes forming a pinning layer on a top surface of the epitaxial layer; and forming a gate structure on a surface of the semiconductor substrate at one side of the epitaxial layer. Further, the method also includes forming a floating diffusion region in the semiconductor substrate at one side of the gate structure far from the epitaxial layer.
1. A pixel structure of a CMOS imaging sensor, comprising:
a semiconductor substrate doped with first type doping ions;
a gate structure formed on the semiconductor substrate;
an epitaxial layer doped with second type doping ions with a doping type opposite to a doping type of the first type doping ions formed in the semiconductor substrate at one side of the gate structure; isolation layers formed between side surfaces of the epitaxial layer and the semiconductor substrate to prevent dark currents from laterally transferring;
a floating diffusion region formed in the semiconductor substrate at the other side of the gate structure; and
a pinning layer formed on the epitaxial layer,
wherein the isolation layers are formed by: forming a hard mask layer having an opening on the semiconductor substrate;
forming a trench in the semiconductor substrate using the hard mask layer as an etching mask;
forming an isolation material layer on side surfaces of the trench, performing a mask-less process onto the isolation material layer and filling the trench with the epitaxial layer,
wherein a portion of the epitaxial layer is higher than a top surface of the semiconductor substrate, and the portion of the epitaxial layer higher than the top surface of the semiconductor substrate covers a portion of the top surface of the semiconductor substrate around the trench and disposed under a sidewall spacer of the gate structure;
wherein a width of the portion of the epitaxial layer covering the portion of the top surface of the semiconductor substrate around the trench is in a range of approximately 0.1 μm-1 μm.
2. The pixel structure according to claim 1 , wherein a photodiode is formed by the epitaxial layer and the semiconductor substrate.
3. The pixel structure according to claim 1 , wherein the semiconductor substrate is made of silicon; and the isolation layers are made of silicon oxide.
4. The pixel structure according to claim 1 , wherein a thickness of the isolation layers is in a range of approximately 8 nm-20 nm.
5. The pixel structure according to claim 1 , wherein the epitaxial layer is made of silicon.
6. The pixel structure according to claim 1 , wherein the first type doping ions are P-type; and the second type doping ions are N-type.
7. The pixel structure according to claim 1 , wherein the first type doping ions are N-type; and
the second type doping ions are P-type.