Chip-on-wafer structures and methods for forming the same

1. A device comprising:

a package component comprising a substrate;

a through-via penetrating through the substrate;

a conductive feature over a first surface of the package component and electrically coupled to the through-via;

a polymer comprising a first portion contacting a sidewall of the substrate, and a second portion overlapped by the package component; and

a first dielectric pattern comprising:

a first portion over and aligned to the polymer; and

a second portion over the substrate and vertically misaligned with the polymer.

2. The device of claim 1 , wherein the first dielectric pattern comprises an additional polymer.

3. The device of claim 1 , wherein the first dielectric pattern comprises a photo-sensitive material.

4. The device of claim 1 further comprising a device die bonded to the package component, with the device die and the first dielectric pattern being on opposite sides of the package component.

5. The device of claim 1 , wherein the polymer forms a first ring encircling the substrate and contacting sidewalls of the substrate, wherein the first dielectric pattern comprises a second ring over and aligned to the first ring, and wherein the first ring and the second ring have outer edges aligned to each other.

6. The device of claim 1 further comprising:

a second dielectric pattern forming a ring covering edge portions of the conductive feature, wherein the first dielectric pattern and the second dielectric pattern are formed of a same dielectric material, coplanar with each other, and disconnected from each other; and

a Under-Bump-Metallurgy (UBM) over and in contact with a center portion of the conductive feature.

7. The device of claim 1 , wherein the first dielectric pattern is in physical contact with the polymer.

8. A device comprising:

a first device die comprising:

a semiconductor substrate;

a through-via penetrating through the substrate; and

an interconnect structure over the semiconductor substrate;

a second device die underlying and bonded to the first device die;

a molding compound molding the first device die and the second device die therein, wherein the molding compound encircles the first device die and the second device die, and comprises:

a top surface coplanar with a top surface of the interconnect structure; and

a bottom surface coplanar with a bottom surface of the second device die; and

a polymer layer over the interconnect structure, with bottom surfaces of the polymer layer in contact with top surfaces of the molding compound and the interconnect structure.

9. The device of claim 8 , wherein the polymer layer comprises a plurality of discrete portions and a ring portion encircling the plurality of discrete portions, and wherein the plurality of discrete portions and the ring portion are physically separated from each other.

10. The device of claim 9 , wherein the ring portion has outer edges aligned to edges of the molding compound.

11. The device of claim 9 further comprising:

a plurality of Under-Bump-Metallurgies (UBMs) extending into the discrete portions; and

a plurality of solder regions over and contacting the plurality of UBMs.

12. The device of claim 8 , wherein the polymer layer is formed of a photo-sensitive material.

13. The device of claim 8 , wherein the molding compound comprises an additional portion overlapped by the first device die.

14. A device comprising:

a package component comprising a substrate, wherein the substrate comprises a front surface, and a back surface over the front surface;

a through-via penetrating through the substrate;

a die underlying and bonded to a front side of the package component;

a polymer encircling, and in physical contact with, sidewalls of the substrate and sidewalls of the die; and

an insulation layer over the substrate, wherein the insulation layer comprises a bottom surface contacting the back surface of the substrate, and a top surface substantially coplanar with a top surface of the polymer, and wherein the through-via penetrates through the insulation layer.

15. The device of claim 14 , wherein sidewalls of the insulation layer are in physical contact with sidewalls of the polymer.

16. The device of claim 14 , wherein the polymer comprises an outer sidewall forming a ring, wherein the outer sidewall comprises a first portion level with the substrate, and a second portion level with the die, and the first portion and the second portion of the outer sidewall are continuous and vertically aligned with each other.

17. The device of claim 14 further comprising:

a conductive feature over the back surface of the substrate and electrically coupled to the through-via;

a first dielectric pattern forming a ring covering edge portions of the conductive feature;

a Under-Bump-Metallurgy (UBM) over and in contact with a center portion of the conductive feature; and

a second dielectric pattern over and aligned to the polymer, wherein the first dielectric pattern and the second dielectric pattern are separated from each other, and wherein the first and the second dielectric patterns are formed of a same dielectric material.

18. The device of claim 17 , wherein the first and the second dielectric patterns comprise a polymer.

19. The device of claim 17 , wherein the first and the second dielectric patterns comprise a photo sensitive material.

20. The device of claim 17 , wherein the second dielectric pattern forms a ring, with an outer edge of the ring aligned with respective outer edges of the polymer.