IP Library › Granted Patent US 9,124,456
Granted Patent B2
US 9,124,456 · App. 14/178,180 · Granted Sep 1, 2015

Efficient tracking of decision-feedback equaliser coefficients

Inventor: Taku Yamagata (Chepstow, GB)
Assignee: Imagination Technologies Limited
H04L25/03057
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Quick Facts
Patent No.
US 9,124,456
App. No.
14/178,180
Granted
Sep 1, 2015
Kind
B2
Abstract

Efficient methods and apparatus for tracking decision-feedback equaliser (DFE) coefficients are described. In an embodiment, updated coefficients for a feed-forward equaliser (FFE) are generated using conventional methods and then these are used, along with an averaged updated value of channel impulse response (CIR) estimate to generate updated DFE coefficients. In an embodiment, the updated DFE coefficients are generated by multiplying the updated CIR estimate (in the frequency domain) and the updated FFE coefficients (also in the frequency domain). The resultant updated DFE coefficients in the frequency domain may then be converted into the time domain before outputting to the DFE.

Claims (41)

1. A method of generating updated decision-feedback equaliser (DFE) coefficients for use in an equaliser in a wireless receiver, the equaliser comprising a feed-forward equaliser (FFE) and a DFE and the method comprising:

updating a channel impulse response estimate;

updating FFE coefficients;

generating updated DFE coefficients based on the updated channel impulse response estimate and the updated FFE coefficients;

extracting a real part of the updated DFE coefficients; and

converting the real part of the updated DFE coefficients to the time domain.

2. The method according to claim 1 , wherein the FFE coefficients are updated based on a decision directed error signal.

3. The method according to claim 1 , wherein generating updated DFE coefficients comprises:

multiplying the updated channel impulse response estimate in the frequency domain and the updated FFE coefficients in the frequency domain.

4. The method according to claim 3 , further comprising:

removing small noise from the updated channel impulse response estimate prior to using the updated channel impulse response to generate the updated DFE coefficients.

5. The method according to claim 4 , wherein removing small noise from the updated channel impulse response estimate comprises:

converting the updated channel impulse response estimate to the time domain;

coring the updated channel impulse response estimate; and

converting the cored updated channel impulse response estimate to the frequency domain.

6. The method according to claim 1 , further comprising:

coring the time domain updated DFE coefficients.

7. A non-transitory computer readable storage medium having encoded thereon computer readable program code for generating a processor configured to perform the method of claim 1 .

8. An equaliser for use in a wireless receiver, the equaliser comprising a feed-forward equaliser (FFE), a decision-feedback equaliser (DFE) and a coefficient tracking module arranged to generate updated coefficients for the FFE and DFE comprising:

a channel impulse response (CIR) estimation module arranged to store and update an averaged estimate of CIR;

a FFE coefficient update module arranged to generate updated FFE coefficients;

hardware logic arranged to generate updated DFE coefficients based on the updated CIR estimate and the updated FFE coefficients;

a frequency folding module arranged to extract a real part of the updated DFE coefficients; and

an inverse fast Fourier transform (IFFT) module arranged to convert the real part of the updated DFE coefficients to the time domain.

9. The equaliser according to claim 8 , wherein the FFE coefficient update module comprises an input for receiving a decision directed error signal and wherein the module is arranged to update the FFE coefficients based on the received decision directed error signal.

10. The equaliser according to claim 8 , wherein the hardware logic arranged to generate updated DFE coefficients comprises:

a multiplier arranged to multiply the updated channel impulse response estimate in the frequency domain and the updated FFE coefficients in the frequency domain.

11. The equaliser according to claim 8 , wherein the CIR estimation module further comprises:

a core element arranged to remove small noise from the updated CIR estimate prior to outputting the updated CIR estimate to the hardware logic arranged to generate updated DFE coefficients.

12. The equaliser according to claim 11 , wherein the core element comprises:

an inverse fast Fourier transform (IFFT) element arranged to convert the updated CIR estimate to the time domain prior to coring; and

a fast Fourier transform (FFT) element arranged to convert the cored updated CIR estimate back to the frequency domain after coring.

13. The equaliser according to claim 8 , wherein the hardware logic arranged to generate updated DFE coefficients further comprises:

a core module arranged to receive the time domain updated DFE coefficients from the IFFT module and output the cored updated DFE coefficients to the DFE.

14. A non-transitory computer readable storage medium having encoded thereon computer readable program code for generating a processor comprising the equaliser of claim 8 .

15. A digital television receiver comprising an equaliser for use in a wireless receiver, the equaliser comprising a feed-forward equaliser (FFE), a decision-feedback equaliser (DFE) and a coefficient tracking module arranged to generate updated coefficients for the FFE and DFE comprising:

a channel impulse response (CIR) estimation module arranged to store and update an averaged estimate of CIR;

a FFE coefficient update module arranged to generate updated FFE coefficients;

hardware logic arranged to generate updated DFE coefficients based on the updated CIR estimate and the updated FFE coefficients;

a frequency folding module arranged to extract a real part of the updated DFE coefficients; and

an inverse fast Fourier transform (IFFT) module arranged to convert the real part of the updated DFE coefficients to the time domain.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 11, 2014
From: YAMAGATA, TAKU
To: IMAGINATION TECHNOLOGIES, LTD
Reel/Frame 032198/0173 →
Priority Claims (1)
GB 1305593.4 · Mar 27, 2013 · national
Continuity (1)
Related Publication 20140294059A1 · Oct 2, 2014