Silicon carbide semiconductor device
In a silicon carbide semiconductor device, a plurality of trenches has a longitudinal direction in one direction and is arranged in a stripe pattern. Each of the trenches has first and second sidewalls extending in the longitudinal direction. The first sidewall is at a first acute angle to one of a (11-20) plane and a (1-100) plane, the second sidewall is at a second acute angle to the one of the (11-20) plane and the (1-100) plane, and the first acute angle is smaller than the second acute angle. A first conductivity type region is in contact with only the first sidewall in the first and second sidewalls of each of the trenches, and a current path is formed on only the first sidewall in the first and second sidewalls.
1. A silicon carbide semiconductor device comprising:
a silicon carbide semiconductor substrate including a silicon carbide substrate and a drift layer disposed on the silicon carbide substrate, the silicon carbide substrate having one of a first conductivity type and a second conductivity type, the drift layer made of silicon carbide and having the first conductivity type, the silicon carbide semiconductor substrate being an off substrate whose surface has an off angle;
a base region disposed on the drift layer, the base region made of silicon carbide and having the second conductivity type;
a plurality of trenches penetrating the base region from a surface of the base region into the drift layer, the trenches having a longitudinal direction in one direction and arranged in a stripe pattern, each of the trenches having first and second sidewalls extending in the longitudinal direction;
a first conductivity type region being in contact with only the first sidewall in the first and second sidewalls of each of the trenches, the first conductivity type region having a higher impurity concentration than the drift layer;
a contact layer disposed on an opposite side of the first conductivity type region from each of the trenches, the contact layer having the second conductivity type and having a higher impurity concentration than the base region;
a gate insulating layer disposed in each of the trenches;
a gate electrode disposed in each of the trenches via the gate insulating layer;
a first electrode electrically coupled with the first conductivity type region and the contact layer; and
a second electrode electrically coupled with the silicon carbide substrate, wherein
when the gate electrode is applied with a gate voltage, a current path is formed on only the first sidewall in the first and second sidewalk of each of the trenches and electric current flows in the current path,
the surface of the silicon carbide semiconductor substrate has the off angle with respect to one of a (0001) plane and a (000-1) plane,
the silicon carbide semiconductor substrate has an off direction in a <11-20> direction and the longitudinal direction of the trenches is a <1-100> direction that is perpendicular to the off direction, or the silicon carbide semiconductor substrate has an off direction in a <1-100> direction and the longitudinal direction of the trenches is a <11-20> direction that is perpendicular to the off direction,
the first sidewall of the trench is at a first acute angle to one of a (11-20) plane and a (1-100) plane, the second sidewall of the trench is second acute angle to the one of the (11-20) plane and the (1-100) plane, and the first acute angle is smaller than the second acute angle,
the contact layer is in contact with the second sidewall of each of the trenches, and
the contact layer is a body layer extending along an entire depth of the second wall of each of the trenches and to a position deeper than a bottom of each of the trenches.