Amplifier and wireless communication device
In a power amplifier including an amplifier circuit unit for high power mode and an amplifier circuit unit for low power mode provided in parallel thereto between input and output of the amplifier and where, when one amplifier circuit unit is in an operating state, the other amplifier circuit unit is in a non-operating state, a cross-coupled capacitor is provided between a drain of one of two transistors in output side and a gate of the other transistor in the amplifier circuit unit for high power mode, and a series circuit where a switch and a capacitor are coupled in series is coupled between a drain of the transistor of output side in the amplifier circuit unit for low power mode and a ground, the switch being in a conducting state in high power mode operation and being in a non-conducting state in low power mode operation.
1. An amplifier comprising:
a first amplifier circuit unit configured to output a signal having a maximum output power of the amplifier; and
a second amplifier circuit unit provided in parallel with the first amplifier circuit unit between an input and an output of the amplifier and having a higher amplification efficiency than the first amplifier circuit unit in an output power lower than an output power of the first amplifier circuit unit,
wherein, when one of the first amplifier circuit unit and the second amplifier circuit unit is in an operating state in which power amplification of a signal is performed, the other of the first amplifier circuit unit and the second amplifier circuit unit is in a non-operating state in which power amplification of the signal is not performed,
wherein the first amplifier circuit unit includes:
a first transistor whose drain is coupled to a first output node of the first amplifier circuit unit;
a second transistor whose drain is coupled to a second output node of the first amplifier circuit unit; and
a cross-coupled capacitor provided between the drain of one of the first transistor and the second transistor and a gate of the other of the first transistor and the second transistor, and
wherein the second amplifier circuit unit includes:
a first capacitor;
a third transistor whose drain is coupled to an output node of the second amplifier circuit unit via the first capacitor;
a first inductor coupled to a drain of the third transistor; and
a series circuit in which a first switch and a second capacitor are coupled in series between the drain of the third transistor and a ground, the first switch being in a conducting state when the first amplifier circuit unit is in the operating state and being in a non-conducting state when the second amplifier circuit unit is in the operating state.
2. The amplifier according to claim 1 ,
wherein the signal amplified by the amplifier is a differential signal, and
wherein a first circuit component related to one signal of the differential signal among circuit components of the second amplifier circuit unit and a second circuit component related to the other signal of the differential signal among the circuit components of the second amplifier circuit unit are disposed symmetrically with regard to the first amplifier circuit unit.
3. The amplifier according to claim 2 ,
wherein circuit characteristics of the first circuit component and the second circuit component are same.
4. The amplifier according to claim 1 ,
wherein the first amplifier circuit unit includes:
a fourth transistor whose gate is coupled to an input node of the first amplifier circuit unit; and
a second switch configured to cut off supply of a drain voltage of the fourth transistor when the second amplifier circuit unit is in the operating state, and
wherein the second amplifier circuit unit includes:
a fifth transistor whose gate is coupled to an input node of the second amplifier circuit unit; and
a third switch configured to cut off supply of a drain voltage of the fifth transistor when the first amplifier circuit unit is in the operating state.
5. The amplifier according to claim 4 , comprising:
a control circuit configured to receive a control signal indicating which of the first amplifier circuit unit and the second amplifier circuit unit is to be made in the operating state and to control each of the first switch, the second switch and the third switch on the basis of the control signal.
6. The amplifier according to claim 4 ,
wherein the signal amplified by the amplifier is a differential signal, and
wherein a first circuit component related to one signal of the differential signal among circuit components of the second amplifier circuit unit and a second circuit component related to the other signal of the differential signal among the circuit components of the second amplifier circuit unit are disposed symmetrically with regard to the first amplifier circuit unit.
7. The amplifier according to claim 6 ,
wherein circuit characteristics of the first circuit component and the second circuit component are same.
8. The amplifier according to claim 1 , comprising:
a control circuit configured to receive a control signal indicating which of the first amplifier circuit unit and the second amplifier circuit unit is to be made in the operating state and to control the first switch on the basis of the control signal.
9. A wireless communication device, comprising:
a signal processing circuit configured to convert a digital signal included transmission data into an analog signal whose frequency is higher than a frequency of the digital signal; and
an amplifier configured to amplify and output the analog signal converted by the signal processing circuit,
wherein the amplifier includes:
a first amplifier circuit unit configured to output a signal having a maximum output power of the amplifier; and
a second amplifier circuit unit provided in parallel with the first amplifier circuit unit between an input and an output of the amplifier and having a higher amplification efficiency than the first amplifier circuit unit in an output power lower than an output power of the first amplifier circuit unit,
wherein, when one of the first amplifier circuit unit and the second amplifier circuit unit is in an operating state in which power amplification of a signal is performed, the other of the first amplifier circuit unit and the second amplifier circuit unit is in a non-operating state in which power amplification of the signal is not performed,
wherein the first amplifier circuit unit includes:
a first transistor whose drain is coupled to a first output node of the first amplifier circuit unit;
a second transistor whose drain is coupled to a second output node of the first amplifier circuit unit; and
a cross-coupled capacitor provided between the drain of one of the first transistor and the second transistor and a gate of the other of the first transistor and the second transistor, and
wherein the second amplifier circuit unit includes:
a first capacitor;
a third transistor whose drain is coupled to an output node of the second amplifier circuit unit via the first capacitor;
a first inductor coupled to a drain of the third transistor; and
a series circuit in which a first switch and a second capacitor are coupled in series between the drain of the third transistor and a ground, the first switch being in a conducting state when the first amplifier circuit unit is in the operating state and being in a non-conducting state when the second amplifier circuit unit is in the operating state.
10. The wireless communication device according to claim 9 ,
wherein the signal amplified by the amplifier is a differential signal, and
wherein a first circuit component related to one signal of the differential signal among circuit components of the second amplifier circuit unit and a second circuit component related to the other signal of the differential signal among the circuit components of the second amplifier circuit unit are disposed symmetrically with regard to the first amplifier circuit unit.
11. The wireless communication device according to claim 10 ,
wherein circuit characteristics of the first circuit component and the second circuit component are same.
12. The wireless communication device according to claim 9 ,
wherein the first amplifier circuit unit includes:
a fourth transistor whose gate is coupled to an input node of the first amplifier circuit unit; and
a second switch configured to cut off supply of a drain voltage of the fourth transistor when the second amplifier circuit unit is in the operating state, and
wherein the second amplifier circuit unit includes:
a fifth transistor whose gate is coupled to an input node of the second amplifier circuit unit; and
a third switch configured to cut off supply of a drain voltage of the fifth transistor when the first amplifier circuit unit is in the operating state.
13. The wireless communication device according to claim 12 ,
wherein the signal processing circuit outputs to the amplifier a control signal indicating which of the first amplifier circuit unit and the second amplifier circuit unit is to be made in the operating state, and
wherein the amplifier includes a control circuit configured to control the first switch on the basis of the control signal.
14. The wireless communication device according to claim 12 ,
wherein the signal amplified by the amplifier is a differential signal, and
wherein a first circuit component related to one signal of the differential signal among circuit components of the second amplifier circuit unit and a second circuit component related to the other signal of the differential signal among the circuit components of the second amplifier circuit unit are disposed symmetrically with regard to the first amplifier circuit unit.
15. The wireless communication device according to claim 14 ,
wherein circuit characteristics of the first circuit component and the second circuit component are same.
16. The wireless communication device according to claim 9 ,
wherein the signal processing circuit outputs to the amplifier a control signal indicating which of the first amplifier circuit unit and the second amplifier circuit unit is to be made in the operating state, and
wherein the amplifier includes a control circuit configured to control the first switch on the basis of the control signal.