IP Library Granted Patent US 9,153,728
Granted Patent B2
US 9,153,728 · App. 13/346,354 · Granted Oct 6, 2015

Ion implanted solar cells with in situ surface passivation

Inventors: Ajeet Rohatgi (Marietta, GA); Vijay Yelundur (Canton, GA); Vinodh Chandrasekaran (Suwanee, GA); Preston Davis (Atlanta, GA); Ben Damiani (Atlanta, GA)
Assignee: Suniva, Inc.
H01L31/1804H01L21/263H01L21/266H01L31/02363H01L31/068H01L31/1864H01L21/26513Y02E10/547
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Quick Facts
Patent No.
US 9,153,728
App. No.
13/346,354
Granted
Oct 6, 2015
Kind
B2
Abstract

Solar cells and methods for their manufacture are disclosed. An example method may include providing a substrate comprising a base layer and introducing n-type dopant to the front surface of the base layer by ion implantation. The substrate may be annealed by heating the substrate to a temperature to anneal the implant damage and activate the introduced dopant, thereby forming an n-type doped layer into the front surface of the base layer. Oxygen may be introduced during the annealing step to form a passivating oxide layer on the n-type doped layer. Back contacts may be screen-printed on the back surface of the base layer, and a p-type doped layer may be formed at the interface of the back surface of the base layer and the back contacts during firing of the back contacts. The back contacts may provide an electrical connection to the p-type doped layer.

Claims (56)

1. A method for manufacturing a solar cell comprising:

providing a substrate comprising a base layer;

introducing dopant to the front surface of the base layer by ion implantation, wherein the dopant introduced is of n-type conductivity;

annealing the substrate, wherein annealing comprises heating the substrate in a furnace to a temperature to:

anneal the implant damage; and

activate the introduced dopant, thereby forming an n-type doped layer into the front surface of the base layer;

introducing oxygen into the furnace during the annealing step to:

form a passivating oxide layer on at least the front surface of the n-type doped layer;

screen-printing one or more back contacts on the back surface of the base layer;

forming a p-type doped layer at the interface of the back surface of the base layer and the one or more back contacts during firing of the one or more back contacts,

wherein the one or more back contacts provide an electrical connection to the p-type doped layer.

2. The method of claim 1 wherein the substrate is a crystalline silicon substrate.

3. The method of claim 1 , wherein the base layer conductivity is p-type.

4. The method of claim 1 , wherein the base layer conductivity type is n-type.

5. The method of claim 1 , further comprising:

depositing a silicon nitride layer on the front surface of the passivating oxide layer thereby forming an antireflection layer.

6. The method of claim 1 , further comprising:

screen-printing one or more front contacts on the silicon nitride layer, wherein firing the one or more back contacts further comprises firing the one or more front contacts to provide an electrical connection to the n-type doped layer.

7. The method of claim 1 , wherein the one or more back contacts comprise aluminum, and wherein the p-type doped layer comprises aluminum and silicon.

8. A method for manufacturing a solar cell comprising:

providing a substrate comprising a base layer;

introducing dopant to the front surface of the base layer by ion implantation, wherein the dopant introduced is of n-type conductivity;

annealing the substrate, wherein annealing comprises heating the substrate in a furnace to a temperature to:

anneal the implant damage; and

activate the introduced dopant, thereby forming an n-type doped layer into the front surface of the base layer;

introducing oxygen into the furnace during the annealing step to:

form a rear passivating oxide layer on at least the back surface of the base layer;

screen-printing a metal paste over the one or more regions of the rear passivating oxide layer; and

firing the metal paste to:

form one or more local back contacts, wherein the metal paste penetrates the rear passivating oxide layer; and

form one or more local p-type doped regions at the interface of the back surface of the base layer and the one or more local back contacts, wherein the one or more local back contacts provide an electrical connection to the one or more local p-type doped regions.

9. The method of claim 8 wherein the substrate is a crystalline silicon substrate.

10. The method of claim 8 , wherein the base layer conductivity is p-type.

11. The method of claim 8 , wherein the base layer conductivity type is n-type.

12. The method of claim 8 , further comprising:

forming a front surface passivating oxide layer on the front surface of the n-type doped layer;

depositing a silicon nitride layer on the front surface of the front surface passivating oxide layer thereby forming an antireflection layer.

13. The method of claim 8 , further comprising:

screen-printing one or more front contacts on the amorphous silicon nitride layer, wherein firing the one or more back contacts further comprises firing the one or more front contacts to provide an electrical connection to the n-type doped layer.

14. The method of claim 8 , wherein the metal paste comprises aluminum, and wherein the one or more local p-type doped regions comprises aluminum and silicon.

15. A method for manufacturing a solar cell comprising:

providing a substrate comprising a base layer;

introducing dopant to the front surface of the base layer by ion implantation, wherein the dopant introduced is of n-type conductivity;

annealing the substrate, wherein annealing comprises heating the substrate in a furnace to a temperature to:

anneal the implant damage; and

activate the introduced dopant, thereby forming an n-type doped layer into the front surface of the base layer;

screen-printing one or more back contacts on the back surface of the base layer;

forming a p-type doped layer at the interface of the back surface of the base layer and the one or more back contacts during firing of the one or more back contacts,

wherein the one or more back contacts provide an electrical connection to the p-type doped layer.

16. The method of claim 15 wherein the substrate is a crystalline silicon substrate.

17. The method of claim 15 , wherein the base layer conductivity is p-type.

18. The method of claim 15 , wherein the base layer conductivity type is n-type.

19. The method of claim 15 , further comprising:

introducing oxygen into the furnace during the annealing step to:

form a passivating oxide layer on at least the front surface of the n-type doped layer.

20. The method of claim 15 , wherein the one or more back contacts comprise aluminum, and wherein the p-type doped layer comprises aluminum and silicon.

Assignments (3)
SECURITY INTEREST Recorded Dec 17, 2015
From: SUNIVA, INC.
To: SQN ASSET SERVICING, LLC
Reel/Frame 037316/0228 →
PATENT AND TRADEMARK SECURITY AGREEMENT Recorded Jun 14, 2012
From: SUNIVA, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 028380/0595 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 9, 2012
From: ROHATGI, AJEET; YELUNDUR, VIJAY; CHANDRASEKARAN, VINODH; DAVIS, PRESTON; DAMIANI, BEN
To: SUNIVA, INC.
Reel/Frame 027502/0964 →
Continuity (2)
Continuation 12793363 · Jun 3, 2010
Related Publication 20120107998A1 · May 3, 2012