IP Library Granted Patent US 9,154,084
Granted Patent B2
US 9,154,084 · App. 13/953,803 · Granted Oct 6, 2015

Low-noise receiver with complex RF attenuator

Inventors: Navin Harwalkar (Austin, TX); Dan B. Kasha (Seattle, WA)
Assignee: Silicon Laboratories Inc.
H03F1/223H03F1/565H03F3/193H04B1/18H03F2200/213H03F2200/225H03F2200/294
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Quick Facts
Patent No.
US 9,154,084
App. No.
13/953,803
Granted
Oct 6, 2015
Kind
B2
Abstract

An apparatus includes an integrated circuit. The integrated circuit includes a low-noise amplifier having a first complex input impedance. The integrated circuit includes a complex attenuator coupled to an input terminal of the integrated circuit. The complex attenuator has a second complex input impedance and a first complex output impedance. The apparatus may include a matching network coupled to the input terminal of the integrated circuit. The matching network is external to the integrated circuit. The matching network may have a first real input impedance and a second complex output impedance. The second complex output impedance is matched to the second complex input impedance.

Claims (43)

1. An apparatus comprising:

an integrated circuit comprising:

a low-noise amplifier having a first complex input impedance; and

a complex attenuator coupled to an input terminal of the integrated circuit, the complex attenuator having a second complex input impedance and a first complex output impedance, the complex attenuator comprising:

a selectable series impedance circuit having a first selectable impedance coupled between the input terminal of the integrated circuit and an input of the low-noise amplifier; and

a first shunt circuit having a second selectable impedance, the first shunt circuit being coupled between the input terminal of the integrated circuit and a first reference node.

2. The apparatus, as recited in claim 1 , further comprising:

a matching network coupled to the input terminal of the integrated circuit, the matching network being external to the integrated circuit and having a first real input impedance and a second complex output impedance, the second complex output impedance being matched to the second complex input impedance.

3. The apparatus, as recited in claim 1 , wherein the first selectable impedance is a selectable capacitance and the first shunt circuit includes a plurality of circuits selectably coupled in parallel, each circuit of the plurality of circuits including a resistor and a capacitor coupled in series.

4. The apparatus, as recited in claim 1 , wherein the first selectable impedance is a selectable inductance and the first shunt circuit includes a plurality of circuits selectably coupled in parallel, each circuit of the plurality of circuits including a resistor and an inductor coupled in series.

5. The apparatus, as recited in claim 1 , wherein the complex attenuator comprises:

a second shunt circuit having a third selectable impedance coupled between the input of the low-noise amplifier and the first reference node.

6. The apparatus, as recited in claim 5 , wherein the third selectable impedance is a selectable capacitance.

7. The apparatus, as recited in claim 1 , wherein the first reference node is coupled to a second reference node of the low-noise amplifier, the first reference node and the second reference node being coupled to a ground node.

8. The apparatus, as recited in claim 1 , wherein the integrated circuit further comprises:

a circuit configured to adjust an attenuation of the complex attenuator in response to a signal received from the low-noise amplifier.

9. The apparatus, as recited in claim 1 , wherein the complex attenuator is configured to maintain a constant input port reflection coefficient.

10. The apparatus, as recited in claim 1 , further comprising:

a second complex attenuator coupled to an output of the complex attenuator, the second complex attenuator having a third complex input impedance and a second complex output impedance.

11. The apparatus, as recited in claim 1 , wherein the first selectable impedance is a selectable inductance and the first shunt circuit includes a plurality of circuits selectably coupled in parallel, each circuit of the plurality of circuits including a resistor and an inductor coupled in series.

12. An apparatus comprising:

an integrated circuit comprising:

a low-noise amplifier having a first complex input impedance, the low-noise amplifier including an inductor, the first complex input impedance being based on an inductance of the inductor; and

a complex attenuator coupled to an input terminal of the integrated circuit, the complex attenuator having a second complex input impedance and a first complex output impedance.

13. The apparatus, as recited in claim 12 , wherein the complex attenuator comprises:

a selectable series impedance circuit having a first selectable impedance coupled between the input terminal of the integrated circuit and an input of the low-noise amplifier; and

a first shunt circuit having a second selectable impedance, the first shunt circuit being coupled between the input terminal of the integrated circuit and a first reference node.

14. The apparatus, as recited in claim 12 , wherein the complex attenuator comprises:

a shunt impedance circuit having a selectable impedance coupled between an input of the low-noise amplifier and a first reference node.

15. The apparatus, as recited in claim 12 , wherein the integrated circuit further comprises:

a circuit configured to adjust an attenuation of the complex attenuator in response to a signal received from the low-noise amplifier.

16. A method comprising:

receiving a radio frequency signal by an attenuator presenting a complex impedance at an input terminal of an integrated circuit;

providing an attenuated received signal to an amplifier, the attenuated received signal being generated by the attenuator, the attenuator being configured to maintain a complex input impedance at the input terminal of the integrated circuit; and

changing an attenuation of the attenuator while maintaining the complex input impedance at the input terminal of the integrated circuit, the changing the attenuation comprising adjusting a series capacitance and a shunt capacitance to maintain a constant, complex impedance at the input terminal of the integrated circuit.

17. The method, as recited in claim 16 , further comprising:

generating the attenuated received signal by applying a predetermined attenuation to the received signal.

18. The method, as recited in claim 17 , wherein the predetermined attenuation is a capacitive attenuation.

19. The method, as recited in claim 17 , wherein the predetermined attenuation is an inductive attenuation.

20. The method, as recited in claim 16 , wherein an input port reflection coefficient of the attenuator is constant.

21. The method, as recited in claim 16 , wherein the attenuation is changed in response to a magnitude of an input signal received using the input terminal of the integrated circuit.

22. The method, as recited in claim 16 , further comprising:

extending a range of the attenuation using an additional shunt capacitance.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 30, 2013
From: HARWALKAR, NAVIN; KASHA, DAN B.
To: SILICON LABORATORIES INC.
Reel/Frame 030902/0046 →
Continuity (1)
Related Publication 20150035595A1 · Feb 5, 2015