Two-dimensional condensation for uniaxially strained semiconductor fins
Techniques are disclosed for enabling multi-sided condensation of semiconductor fins. The techniques can be employed, for instance, in fabricating fin-based transistors. In one example case, a strain layer is provided on a bulk substrate. The strain layer is associated with a critical thickness that is dependent on a component of the strain layer, and the strain layer has a thickness lower than or equal to the critical thickness. A fin is formed in the substrate and strain layer, such that the fin includes a substrate portion and a strain layer portion. The fin is oxidized to condense the strain layer portion of the fin, so that a concentration of the component in the strain layer changes from a pre-condensation concentration to a higher post-condensation concentration, thereby causing the critical thickness to be exceeded.
1. A fin-based transistor device, comprising:
a silicon germanium strain layer provided on a silicon bulk substrate; and
a fin formed in the substrate and strain layer, such that the fin includes a silicon bulk substrate portion and a strain layer portion, the strain layer portion having a concentration of germanium of 75% or higher, a concentration of silicon of 25% or lower, a lateral thickness of 20 nm or less across the strain layer portion at one or more locations, and the strain layer portion having a lateral thickness less than that of a lateral thickness of the silicon bulk substrate portion where the silicon bulk substrate portion contacts the strain layer portion.
2. The device of claim 1 further comprising:
a gate,
a drain region, and
a source region.
3. The device of claim 1 wherein the fin has a uniaxial strain in a current flow axis.
4. The device of claim 1 wherein the fin has a two-dimensional distribution of germanium in the strain layer portion.
5. The device of claim 1 wherein the strain layer portion of the fin has a vertical height that exceeds a critical thickness, wherein the critical thickness is dependent on the germanium concentration of the strain layer.
6. A fin-based transistor device, comprising:
a silicon bulk base substrate; and
a fin having a lower silicon bulk substrate portion and an upper strain layer portion on the lower substrate portion, wherein the concentration of a component in the upper strain layer portion determines a critical thickness, wherein the critical thickness is exceeded by the thickness of the upper strain layer portion, and wherein the upper strain layer portion having a lateral thickness less than that of a lateral thickness of the lower silicon bulk substrate portion where the silicon bulk substrate portion contacts the strain layer portion.
7. The fin-based transistor device of claim 6 , wherein the upper strain layer portion is stacked on top of the lower substrate portion.
8. The fin-based transistor device of claim 6 , wherein the component is germanium.
9. The fin-based transistor device of claim 6 , wherein the upper strain layer portion is silicon germanium.
10. The fin-based transistor device of claim 6 , further comprising:
a gate;
a drain region; and
a source region.
11. The fin-based transistor device of claim 6 , wherein the upper strain layer portion has a uniaxial strain along a current flow axis.
12. The fin-based transistor device of claim 6 , wherein the device comprises at least one PMOS FinFET tri-gate and/or double gate transistor.
13. The fin-based transistor device of claim 6 , wherein the upper strain layer portion has a two-dimensional distribution of the component.
14. A fin-based transistor device, comprising:
a silicon germanium strain layer provided on a silicon bulk substrate; and
a fin having a pair of opposing sidewalls formed in the substrate and strain layer, such that the fin includes:
a silicon bulk substrate portion; and
a silicon germanium strain layer portion having a lateral thickness of 20 nm or less across the strain layer portion at one or more locations, wherein a first concentration of the germanium along the sidewalls is greater than a second germanium concentration in a middle of the strain layer portion of the fin, and
the silicon germanium strain layer portion having a lateral thickness less than that of a lateral thickness of the silicon bulk substrate portion where the silicon bulk substrate portion contacts the strain layer portion.
15. The fin-based transistor device of claim 14 , wherein the silicon germanium strain layer portion is stacked on top of the silicon bulk substrate portion.
16. The fin-based transistor device of claim 14 , further comprising:
a gate;
a drain region; and
a source region.
17. The fin-based transistor device of claim 14 , wherein the upper strain layer portion has a uniaxial strain along a current flow axis.
18. The fin-based transistor device of claim 14 , wherein the device comprises at least one PMOS FinFET tri-gate and/or double gate transistor.
19. The device of claim 14 wherein the strain layer portion of the fin has a vertical height that exceeds a critical thickness, wherein the critical thickness is dependent on the germanium concentration of the strain layer.