FIFO affinity for multiple ports
A mechanism is provided in a data processing system for shared buffer affinity for multiple ports. The mechanism configures a physical first-in-first-out (FIFO) buffer with a plurality of FIFO segments associated with a plurality of network ports. The plurality of network ports share the physical FIFO buffer. The mechanism identifies a FIFO segment under stress within the plurality of FIFO segments. The mechanism reconfigures the physical FIFO buffer to assign a portion of buffer space from a FIFO segment not under stress within the plurality of FIFO segments to the FIFO segment under stress.
1. A computer program product comprising a non-transitory computer readable medium having a computer readable program stored therein, wherein the computer readable program, when executed on a computing device, causes the computing device to:
configure a physical first-in-first-out (FIFO) buffer with a plurality of FIFO segments associated with a plurality of network ports, wherein the plurality of network ports share the physical FIFO buffer;
identify a FIFO segment under stress within the plurality of FIFO segments, wherein each of the FIFO segment under stress and a FIFO segment not under stress have a user specified high watermark;
determining whether space is available within a resize window to allocate to the FIFO segment under stress wherein the resize window comprises buffer space between the high watermark of the FIFO segment under stress and the high watermark of the FIFO segment not under stress; and
reconfigure the physical FIFO buffer to assign a portion of buffer space from a FIFO segment not under stress within the plurality of FIFO segments to the FIFO segment under stress.
2. The computer program product of claim 1 , wherein identifying the FIFO segment under stress comprises determining the plurality of network ports are part of a link aggregation and a network link of a network port associated with the FIFO segment not under stress is lost.
3. The computer program product of claim 2 , wherein reconfiguring the physical FIFO buffer comprises assigning the entire physical FIFO buffer to the FIFO segment under stress.
4. The computer program product of claim 1 , wherein identifying the FIFO segment under stress comprises determining a network port associated with the FIFO segment not under stress is unused.
5. The computer program product of claim 4 , wherein reconfiguring the physical FIFO buffer comprises assigning the entire physical FIFO buffer to the FIFO segment under stress.
6. The computer program product of claim 1 , wherein identifying the FIFO segment under stress comprises:
monitoring hardware specific counters for the plurality of FIFO segments; and
detecting one or more direct memory access (DMA) overrun errors associated with the FIFO segment under stress.
7. The computer program product of claim 1 , wherein reconfiguring the physical FIFO buffer comprises determining whether the FIFO segment not under stress has free space to cede to the FIFO segment under stress.
8. The computer program product of claim 1 , wherein each of the FIFO segment under stress and the FIFO segment not under stress have a user specified low watermark.
9. The computer program product of claim 8 , wherein determining whether space is available within the resize window determines whether space is available up to the low watermark of the FIFO segment not under stress.
10. An apparatus comprising:
a processor; and
a memory coupled to the processor, wherein the memory comprises instructions which, when executed by the processor, cause the processor to:
configure a physical first-in-first-out (FIFO) buffer with a plurality of FIFO segments associated with a plurality of network ports, wherein the plurality of network ports share the physical FIFO buffer;
identify a FIFO segment under stress within the plurality of FIFO segments, wherein each of the FIFO segment under stress and a FIFO segment not under stress have a user specified high watermark;
determining whether space is available within a resize window to allocate to the FIFO segment under stress, wherein the resize window comprises buffer space between the high watermark of the FIFO segment under stress and the high watermark of the FIFO segment not under stress; and
reconfigure the physical FIFO buffer to assign a portion of buffer space from a FIFO segment not under stress within the plurality of FIFO segments to the FIFO segment under stress.
11. The apparatus of claim 10 , wherein identifying the FIFO segment under stress comprises determining the plurality of network ports are part of a link aggregation and a network link of a network port associated with the FIFO segment not under stress is lost.
12. The apparatus of claim 11 , wherein reconfiguring the physical FIFO buffer comprises assigning the entire physical FIFO buffer to the FIFO segment under stress.
13. The apparatus of claim 10 , wherein identifying the FIFO segment under stress comprises determining a network port associated with the FIFO segment not under stress is unused.
14. The apparatus of claim 13 , wherein reconfiguring the physical FIFO buffer comprises assigning the entire physical FIFO buffer to the FIFO segment under stress.
15. The apparatus of claim 10 , wherein identifying the FIFO segment under stress comprises:
monitoring hardware specific counters for the plurality of FIFO segments; and
detecting one or more direct memory access (DMA) overrun errors associated with the FIFO segment under stress.
16. The apparatus of claim 10 , wherein reconfiguring the physical FIFO buffer comprises determining whether the FIFO segment not under stress has free space to cede to the FIFO segment under stress.
17. The apparatus of claim 10 , wherein each of the FIFO segment under stress and the FIFO segment not under stress have a user specified low watermark.
18. The apparatus of claim 17 , wherein determining whether space is available within the resize window determines whether space is available up to the low watermark of the FIFO segment not under stress.