Light-emitting device and driving method thereof
In a light emitting device, luminance irregularities caused by fluctuation in threshold of TFTs for supplying a current to EL elements among pixels hinder the light emitting device from improving the image quality. A voltage equal to the threshold of a TFT 110 is held in capacitor means 111 in advance. When a video signal is inputted from a source signal line, the voltage held in the capacitor means is added to the signal, which is then applied to a gate electrode of the TFT 110 . Even when threshold is fluctuated among pixels, each threshold is held in the capacitor means 111 of each pixel, and therefore, influence of the threshold fluctuation can be removed. Since the threshold is stored in the capacitor means 111 alone and the voltage between two electrodes is not changed while a video signal is written, fluctuation in capacitance value has no influence.
1. A semiconductor device comprising:
a first transistor comprising a first gate, a first source, and a first drain;
a second transistor comprising a second gate, a second source, and a second drain;
a third transistor comprising a third gate, a third source, and a third drain;
a fourth transistor comprising a fourth gate, a fourth source, and a fourth drain;
a fifth transistor comprising a fifth gate, a fifth source, and a fifth drain;
a sixth transistor comprising a sixth gate, a sixth source, and a sixth drain;
a capacitor comprising a first electrode and a second electrode;
a third electrode;
an organic insulating layer over the third electrode, the organic insulating layer having an opening;
an EL layer over the organic insulating layer;
a fourth electrode over the EL layer; and
a layer over the fourth electrode, the layer comprising silicon and nitrogen,
wherein the first gate is directly connected to a first gate signal line,
wherein one of the first source and the first drain is directly connected to the first electrode,
wherein one of the first source and the first drain is directly connected to one of the fifth source and the fifth drain,
wherein the other of the first source and the first drain is directly connected to a source signal line,
wherein one of the second source and the second drain is electrically connected to the second electrode,
wherein the one of the second source and the second drain is electrically connected to the third gate,
wherein the other of the second source and the second drain is electrically connected to one of the third source and the third drain,
wherein the one of the third source and the third drain is directly connected to one of the fourth source and the fourth drain,
wherein the other of third source and the third drain is directly connected to a first wiring,
wherein the fourth gate is directly connected to a second gate signal line,
wherein the other of the fourth source and the fourth drain is directly connected to the third electrode,
wherein the sixth gate is directly connected to a third gate signal line,
wherein one of the sixth source and the sixth drain is electrically connected to the third electrode,
wherein the other of the sixth source and the sixth drain is directly connected to a second wiring,
wherein the third electrode is overlapped with a channel formation region of the first transistor, and
wherein the layer overlaps with the channel formation region of the first transistor.
2. The semiconductor device according to claim 1 , wherein the other of the fifth source and the fifth drain is directly connected to the other of the third source and the third drain.
3. The semiconductor device according to claim 1 , wherein the second gate is directly connected to a fourth gate signal line.
4. The semiconductor device according to claim 1 , wherein one of the sixth source and the sixth drain is directly connected to the one of the third source and the third drain.
5. The semiconductor device according to claim 1 , wherein one of the sixth source and the sixth drain is electrically connected to the third electrode through the fourth transistor.
6. The semiconductor device according to claim 1 , further comprising a second capacitor comprising a fifth electrode and a sixth electrode,
wherein the fifth electrode is directly connected to the first wiring, and
wherein the sixth electrode is directly connected to the one of the first source and the first drain.
7. The semiconductor device according to claim 1 , wherein the fifth gate is directly connected to a fourth gate signal line.
8. The semiconductor device according to claim 1 ,
wherein the one of the second source and the second drain is directly connected to the second electrode and the third gate, and
wherein the other of the second source and the second drain is directly connected to the one of the third source and the third drain.
9. The semiconductor device according to claim 1 , wherein the second transistor has a single-gate.
10. The semiconductor device according to claim 1 , wherein at least one of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor has a single-gate.
11. An electric apparatus comprising:
the semiconductor device according to claim 1 ; and
at least one of a speaker, a display, an antenna, an audio input portion, and an operation keys.
12. A module comprising:
the semiconductor device according to claim 1 ; and
a flexible printed circuit.
13. A semiconductor device comprising:
a substrate comprising a resin;
a first transistor comprising a first gate, a first source, and a first drain;
a second transistor comprising a second gate, a second source, and a second drain;
a third transistor comprising a third gate, a third source, and a third drain;
a fourth transistor comprising a fourth gate, a fourth source, and a fourth drain;
a fifth transistor comprising a fifth gate, a fifth source, and a fifth drain;
a sixth transistor comprising a sixth gate, a sixth source, and a sixth drain;
a capacitor comprising a first electrode and a second electrode;
a third electrode;
an organic insulating layer over the third electrode, the organic insulating layer having an opening;
an EL layer over the organic insulating layer;
a fourth electrode over the EL layer; and
a layer over the fourth electrode, the layer comprising silicon and nitrogen,
wherein the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the capacitor, and the third electrode is positioned over the substrate,
wherein the first gate is directly connected to a first gate signal line,
wherein one of the first source and the first drain is directly connected to the first electrode,
wherein one of the first source and the first drain is directly connected to one of the fifth source and the fifth drain,
wherein the other of the first source and the first drain is directly connected to a source signal line,
wherein one of the second source and the second drain is electrically connected to the second electrode,
wherein the one of the second source and the second drain is electrically connected to the third gate,
wherein the other of the second source and the second drain is electrically connected to one of the third source and the third drain,
wherein the one of the third source and the third drain is directly connected to one of the fourth source and the fourth drain,
wherein the other of third source and the third drain is directly connected to a first wiring,
wherein the fourth gate is directly connected to a second gate signal line,
wherein the other of the fourth source and the fourth drain is directly connected to the third electrode,
wherein the sixth gate is directly connected to a third gate signal line,
wherein one of the sixth source and the sixth drain is electrically connected to the third electrode,
wherein the other of the sixth source and the sixth drain is directly connected to a second wiring,
wherein the third electrode is overlapped with a channel formation region of the first transistor, and
wherein the layer overlaps with the channel formation region of the first transistor.
14. The semiconductor device according to claim 13 , wherein the other of the fifth source and the fifth drain is directly connected to the other of the third source and the third drain.
15. The semiconductor device according to claim 13 , wherein the second gate is directly connected to a fourth gate signal line.
16. The semiconductor device according to claim 13 , wherein one of the sixth source and the sixth drain is directly connected to the one of the third source and the third drain.
17. The semiconductor device according to claim 13 , wherein one of the sixth source and the sixth drain is electrically connected to the third electrode through the fourth transistor.
18. The semiconductor device according to claim 13 , further comprising a second capacitor comprising a fifth electrode and a sixth electrode,
wherein the fifth electrode is directly connected to the first wiring, and
wherein the sixth electrode is directly connected to the one of the first source and the first drain.
19. The semiconductor device according to claim 13 , wherein the fifth gate is directly connected to a fourth gate signal line.
20. The semiconductor device according to claim 13 ,
wherein the one of the second source and the second drain is directly connected to the second electrode and the third gate, and
wherein the other of the second source and the second drain is directly connected to the one of the third source and the third drain.
21. The semiconductor device according to claim 13 , wherein the second transistor has a single-gate.
22. The semiconductor device according to claim 13 , wherein at least one of the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the sixth transistor has a single-gate.
23. The semiconductor device according to claim 13 , wherein the resin is acrylic resin.
24. An electric apparatus comprising:
the semiconductor device according to claim 13 ; and
at least one of a speaker, a display, an antenna, an audio input portion, and an operation keys.
25. A module comprising:
the semiconductor device according to claim 13 ; and
a flexible printed circuit.