IP Library Granted Patent US 9,177,884
Granted Patent B2
US 9,177,884 · App. 13/647,474 · Granted Nov 3, 2015

Two-sided-access extended wafer-level ball grid array (eWLB) package, assembly and method

Inventor: Nikolaus W. Schunk (Maxhuette-Haidof, DE)
Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
H01L23/3107H01L23/5389H01L24/05H01L24/06H01L24/19H01L24/20H01L24/24H01L24/73H01L24/96H01L25/105H01L21/561H01L21/568H01L24/13H01L24/16H01L24/81H01L24/82H01L25/167H01L33/62H01L2224/02381H01L2224/0346H01L2224/0384H01L2224/0401H01L2224/04105H01L2224/05548H01L2224/05647H01L2224/06181H01L2224/12105H01L2224/131H01L2224/16227H01L2224/24137H01L2224/2518H01L2224/73259H01L2224/94H01L2224/96H01L2225/1035H01L2225/1058H01L2924/12041
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,177,884
App. No.
13/647,474
Granted
Nov 3, 2015
Kind
B2
Abstract

A two-sided-access (TSA) eWLB is provided that makes it possible to easily access electrical contact pads disposed on both the front and rear faces of the die(s) of the eWLB package. When fabricating the IC die wafer, metal stamps are formed in the IC die wafer in contact with the rear faces of the IC dies. When the IC dies are subsequently reconstituted in an artificial wafer, portions of the metal stamps are exposed through the mold of the artificial wafer. When the artificial wafer is sawed to singulate the TSA eWLB packages and the packages are mounted on PCBs, any electrical contact pad that is disposed on the rear face of the IC die can be accessed via the respective metal stamp of the IC die.

Claims (70)

1. A two-sided-access extended, or embedded, wafer-level ball grid array (TSA eWLB) package comprising:

a mold having a front side and a rear side;

a redistribution layer disposed on front side of the mold, the redistribution layer including layers of metal and layers of dielectric material that are patterned to form predetermined patterns of electrical traces;

at least a first integrated circuit (IC) die disposed inside of the mold such that a front face of the first IC die is in contact with the redistribution layer, the front face of the die having at least a first electrical contact pad disposed thereon that is in contact with the redistribution layer;

a first metal stamp disposed on a rear face of the first IC die, wherein a portion of the metal stamp is exposed through the rear side of the mold, the rear face of the die having at least a first electrical contact pad disposed thereon that is in contact with the first metal stamp, and wherein the first IC die is free of any electrical connection through the first IC die between the metal stamp and the first electrical contact pad disposed on the front face of the die, and is free of any electrical connection through the first IC die between the first electrical contact pad disposed on the rear face of the die and the first electrical contact pad disposed on the front face of the die;

at least a first solder ball disposed on the exposed portion of the metal stamp;

at least a second IC die disposed inside of the mold such that a front face of the second IC die is in contact with the redistribution layer;

a second metal stamp disposed on a rear face of the second IC die, wherein a portion of the second metal stamp is exposed through the rear side of the mold;

at least a second solder ball disposed on the exposed portion of the second metal stamp; and

at least a first thru-via (TV) comprising a hole that extends from the rear side of the mold to the front side of the mold and that is filled with an electrically-conductive material, wherein a first end of the first TV is located on the rear side of the mold and a second end of the first TV is located on the front side of the mold; and

at least a third solder ball disposed on the first end of the first TV wherein the third solder ball is electrically connected to a second electrical contact pad disposed on the front face of the first IC die by a first electrical trace of the redistribution layer.

2. The TSA eWLB package of claim 1 , wherein the first and second IC dies are of different types.

3. The TSA eWLB package of claim 1 , wherein the second IC die has at least a first electrical contact pad disposed on the front faces thereof, and wherein the first electrical contact pads disposed on the front faces of the first and second IC dies are electrically interconnected with one another by a second electrical trace of the redistribution layer.

4. The TSA eWLB package of claim 1 , wherein:

the first thru-via (TV) comprises a first thru-mold via (TMV) formed in the mold.

5. The TSA eWLB package of claim 1 , wherein the second IC die is a silicon die, and wherein:

the first thru-via (TV) comprises a first thru-silicon via (TSV) formed in the second IC die, the first TSV comprising a hole that extends from the rear face of the second IC die to the front face of the second IC die and that is filled with an electrically-conductive material, wherein a first end of the first TSV is located on the rear face of the second IC die and a second end of the first TSV is located on the front face of the second IC die;

a first TSV electrical contact disposed on the rear face of the second IC die in contact with the first end of the first TSV; and

wherein the third solder ball is disposed on the first TSV electrical contact.

6. The TSA eWLB package of claim 5 , wherein the second end of the first TSV is electrically connected to the second electrical contact pad disposed on the front face of the second IC die by the first second electrical trace of the redistribution layer.

7. The TSA eWLB package of claim 1 , further comprising:

an optical element formed in a portion of the redistribution layer that is located adjacent the front face of the first IC die.

8. The TSA eWLB package of claim 7 , wherein the optical element is a refractive lens.

9. The TSA eWLB package of claim 7 , wherein the optical element is a Fresnel lens.

10. The TSA eWLB package of claim 7 , wherein the optical element is a holographic element.

11. A two-sided-access extended, or embedded, wafer-level ball grid array (TSA eWLB) assembly comprising:

a TSA eWLB package comprising:

a mold having a front side and a rear side,

a redistribution layer disposed on front side of the mold, the redistribution layer including layers of metal and layers of dielectric material that are patterned to form predetermined patterns of electrical traces,

at least a first integrated circuit (IC) die disposed inside of the mold such that a front face of the first IC die is in contact with the redistribution layer, the front face of the first IC die having at least a first electrical contact pad disposed thereon that is in contact with the redistribution layer,

a first metal stamp disposed on a rear face of the first IC die, wherein a portion of the metal stamp is exposed through the rear side of the mold, the rear face of the first IC die having at least a first electrical contact pad disposed thereon that is in contact with the first metal stamp, and wherein the first IC die is free of any electrical connection through the first IC die between the metal stamp and the first electrical contact pad disposed on the front face of the die, and is free of any electrical connection through the first IC die between the first electrical contact pad disposed on the rear face of the die and the first electrical contact pad disposed on the front face of the die, and

at least a first solder ball disposed on the exposed portion of the metal stamp,

at least a second IC die disposed inside of the mold such that a front face of the second IC die is in contact with the redistribution layer;

a second metal stamp disposed on a rear face of the second IC die, wherein a portion of the second metal stamp is exposed through the rear side of the mold,

at least a second solder ball disposed on the exposed portion of the second metal stamp,

at least a first thru-via (TV) comprising a hole that extends from the rear side of the mold to the front side of the mold and that is filled with an electrically-conductive material, wherein a first end of the first TV is located on the rear side of the mold and a second end of the first TV is located on the front side of the mold; and

at least a third solder ball disposed on the first end of the first TV wherein the third solder ball is electrically connected to a second electrical contact pad disposed on the front face of the first IC die by a first electrical trace of the redistribution layer; and

a printed circuit board (PCB) having an upper surface and a lower surface, the upper surface having electrical contacts disposed thereon, the TSA eWLB package being mounted rear-side down on the upper surface of the PCB such that said at least a first solder ball, second solder ball, and third solder ball of the TSA eWLB package are each in contact with a different one of the electrical contacts disposed on the upper surface of the PCB.

12. The TSA eWLB assembly of claim 11 , wherein the first and second IC dies are of different types.

13. The TSA eWLB assembly of claim 11 , wherein the second IC die has at least a first electrical contact pad disposed on the front face thereof, and wherein the first electrical contact pads disposed on the front faces of the first and second IC dies are electrically interconnected with one another by a second electrical trace of the redistribution layer.

14. The TSA eWLB assembly of claim 11 , wherein the first thru-via (TV) comprises a first thru-mold via (TMV) formed in the mold.

15. The TSA eWLB assembly of claim 11 , wherein the second IC die is a silicon die, and wherein:

the first thru-via (TV) comprises a first thru-silicon via (TSV) formed in the second IC die, the first TSV comprising a hole that extends from the rear face of the second IC die to the front face of the second IC die and that is filled with an electrically-conductive material, wherein a first end of the first TSV is located on the rear face of the second IC die and a second end of the first TSV is located on the front face of the second IC die;

a first TSV electrical contact disposed on the rear face of the second IC die in contact with the first end of the first TSV; and

wherein the third solder ball is disposed on the first TSV electrical contact.

16. The TSA eWLB assembly of claim 15 , wherein the second end of the first TSV is electrically connected to the second electrical contact pad disposed on the front face of the second IC die by the first electrical trace of the redistribution layer.

17. The TSA eWLB assembly of claim 11 , wherein the first IC die is an electrical-to-optical converter and the second IC die is an optical-to-electrical converter, and wherein the assembly further comprises:

a cap secured to the front side of the mold, the cap having first and second optical pathways formed therein, the first and second optical pathways being located above the first and second IC dies, respectively, the first optical pathway directing light emitted by the first IC die in a direction that is away from the first IC die and generally normal to the front face of the first IC die, the second optical pathway directing light that falls onto the assembly and onto the second optical pathway in a direction that is toward the second IC die and generally normal to the front face of the second IC die.

18. A method for providing a two-sided-access extended, or embedded, wafer-level ball grid array (TSA eWLB) assembly comprising:

providing a TSA eWLB package comprising:

a mold having a front side and a rear side,

a redistribution layer disposed on front side of the mold, the redistribution layer including layers of metal and layers of dielectric material that are patterned to form predetermined patterns of electrical traces,

at least a first integrated circuit (IC) die disposed inside of the mold such that a front face of the first IC die is in contact with the redistribution layer, the front face of the first IC die having at least a first electrical contact pad disposed thereon that is in contact with the redistribution layer,

a first metal stamp disposed on a rear face of the first IC die, wherein a portion of the metal stamp is exposed through the rear side of the mold, the rear face of the first IC die having at least a first electrical contact pad disposed thereon that is in contact with the first metal stamp, and wherein the first IC die is free of any electrical connection through the first IC die between the metal stamp and the first electrical contact pad disposed on the front face of the die, and is free of any electrical connection through the first IC die between the first electrical contact pad disposed on the rear face of the die and the first electrical contact pad disposed on the front face of the die,

at least a first solder ball disposed on the exposed portion of the metal stamp,

at least a second IC die disposed inside of the mold such that a front face of the second IC die is in contact with the redistribution layer,

a second metal stamp disposed on a rear face of the second IC die, wherein a portion of the second metal stamp is exposed through the rear side of the mold,

at least a second solder ball disposed on the exposed portion of the second metal stamp,

at least a first thru-via (TV) comprising a hole that extends from the rear side of the mold to the front side of the mold and that is filled with an electrically-conductive material, wherein a first end of the first TV is located on the rear side of the mold and a second end of the first TV is located on the front side of the mold, and

at least a third solder ball disposed on the first end of the first TV wherein the third solder ball is electrically connected to a second electrical contact pad disposed on the front face of the first IC die by a first electrical trace of the redistribution layer; and

mounting the TSA eWLB package rear-side down on an upper surface of a printed circuit board (PCB) such that said at least a first solder ball, second solder ball, and third solder ball of the TSA eWLB package are each in contact with a respective one of a plurality of electrical contacts disposed on the upper surface of the PCB.

19. The method of claim 18 , wherein the first and second IC dies are of different types.

20. The method of claim 18 , wherein the second IC die has at least a first electrical contact pad disposed on the front faces thereof, and wherein the first electrical contacts disposed on the front faces of the first and second IC dies are electrically interconnected with one another by a second electrical trace of the redistribution layer.

21. The method of claim 18 , wherein:

the first thru-via (TV) comprises a first thru-mold via (TMV) formed in the mold.

22. The method assembly of claim 18 , wherein the second IC die is a silicon die, and wherein:

the first thru-via (TV) comprises a first thru-silicon via (TSV) formed in the second IC die, the first TSV comprising a hole that extends from the rear face of the second IC die to the front face of the second IC die and that is filled with an electrically-conductive material, wherein a first end of the first TSV is located on the rear face of the second IC die and a second end of the first TSV is located on the front face of the second IC die;

a first TSV electrical contact disposed on the rear face of the second IC die in contact with the first end of the first TSV; and

wherein the third solder ball is disposed on the first TSV electrical contact.

23. The method of claim 22 , wherein the second end of the first TSV is electrically connected to the second electrical contact pad disposed on the front face of the second IC die by the first electrical trace of the redistribution layer.

Assignments (8)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047422 FRAME: 0464. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0702 →
MERGER Recorded Oct 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047422/0464 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032851-0001) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 037689/0001 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032851/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED ON REEL 029101 FRAME 0681. ASSIGNOR(S) HEREBY CONFIRMS THE CORRECT ASSIGNEE NAME IS AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.. Recorded Jul 16, 2013
From: SCHUNK, NICKOLAUS W
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 030812/0142 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 10, 2012
From: SCHUNK, NICKOLAUS W
To: AVAGO TECHNOLOGIES GENERAL IP PTE. LTD.
Reel/Frame 029101/0681 →
Continuity (1)
Related Publication 20140097536A1 · Apr 10, 2014