IP Library Granted Patent US 9,182,807
Granted Patent B2
US 9,182,807 · App. 13/731,414 · Granted Nov 10, 2015

Systems and methods for predictive power management in a computing center

Inventors: Richard Michael Wolski (Goleta, GA); John Brevik (Anaheim, CA)
Assignee: Hewlett-Packard Development Company, L.P.
G06F1/3287G06F1/3206G06F9/46Y02B60/1282
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Quick Facts
Patent No.
US 9,182,807
App. No.
13/731,414
Granted
Nov 10, 2015
Kind
B2
Abstract

Aspects and implementations of the present disclosure are directed to systems and methods for predictive power management in a computing center. In general, in some implementations, a system for conserving resources in a multi-processor computing environment monitors usage of the processors in the environment and maintains a sorted list of usage changes that occur in each of a plurality of periodic intervals. The system uses the sorted list to predict, according to configurable parameters, how many processors will need to be available during a subsequent interval. In some implementations, the monitored intervals are consecutive and immediately prior to the subsequent interval. In some implementations, the usage changes during a periodic interval are determined as the difference between a maximum number of active-busy processors during the periodic interval and an initial number of active-busy processors for the periodic interval.

Claims (41)

1. A method for conserving resources in a multi-processor computing environment, the method comprising:

monitoring, by a data processing system, usage of one or more processors in a multi-processor computing environment over a plurality of periodic intervals, wherein each periodic interval has a number of active-busy processors and a number of active-idle processors;

determining, for each periodic interval, from the monitoring, a delta value representing a change in the number of active-busy processors during the respective interval;

maintaining a sorted list of delta values;

determining, from the sorted list, using a configurable quantile and a configurable confidence, a predicted delta value for a subsequent interval; and

causing a number of processors in the multi-processor computing environment to transition between a non-active state and an active-idle state, wherein the number of processors transitioned is based on the predicted delta value.

2. The method of claim 1 , wherein monitoring comprises observing an initial number of active-busy processors for each periodic interval and observing a maximum number of active-busy processors during each periodic interval.

3. The method of claim 2 , wherein determining a delta value for a periodic interval comprises calculating the difference between the maximum number of active-busy processors during the periodic interval and the initial number of active-busy processors for the periodic interval.

4. The method of claim 1 , wherein the data processing system is external to the multi-processor computing environment.

5. The method of claim 1 , wherein the periodic intervals are consecutive and the subsequent interval is consecutive to the plurality of periodic intervals.

6. The method of claim 1 , wherein maintaining a sorted list of delta values comprises adding a new value to the list after a new periodic interval and removing an oldest entry from the sorted list.

7. The method of claim 1 , wherein the sorted list of delta values is a linked list.

8. The method of claim 1 , wherein causing a processor to transition between a non-active state and an active-idle state comprises one of:

(i) powering up a non-active processor;

(ii) powering down an active-idle processor;

(iii) waking up a non-active processor from a low power state;

(iv) placing an active-idle processor in a low power state; and

(v) sending an instruction to a processor control system.

9. The method of claim 1 , wherein the number of processors caused to transition is equal to the predicted delta value.

10. The method of claim 1 , wherein the subsequent interval begins substantially concurrently with causing a number of processors to transition between a non-active state and an active-idle state.

11. A system for conserving resources in a multi-processor computing environment, the system comprising:

a monitoring system comprising a network connection, computer memory, and one or more computer processors configured to:

monitor usage of one or more processors in a multi-processor computing environment over a plurality of periodic intervals, wherein each periodic interval has a number of active-busy processors and a number of active-idle processors;

determine, for each periodic interval, from the monitoring, a delta value representing a change in the number of active-busy processors processor during the respective interval;

maintain a sorted list of delta values;

determine, from the sorted list, using a configurable quantile and a configurable confidence, a predicted delta value for a subsequent interval; and

cause a number of processors in the multi-processor computing environment to transition between a non-active state and an active-idle state, wherein the number of processors transitioned is based on the predicted delta value.

12. The system of claim 11 , wherein the one or more processors are configured to monitor usage by observing an initial number of active-busy processors for each periodic interval and observing a maximum number of active-busy processors during each periodic interval.

13. The system of claim 12 , wherein the one or more processors are configured to determine a delta value for a periodic interval by calculating the difference between the maximum number of active-busy processors during the periodic interval and the initial number of active-busy processors for the periodic interval.

14. The system of claim 11 , wherein the monitoring system is external to the multi-processor computing environment.

15. The system of claim 11 , wherein the periodic intervals are consecutive and the subsequent interval is consecutive to the plurality of periodic intervals.

16. The system of claim 11 , wherein the one or more processors are configured to maintain a sorted list of delta values by adding a new value to the list after a new periodic interval and removing an oldest entry from the sorted list.

17. The system of claim 11 , wherein the sorted list of delta values is a linked list.

18. The system of claim 11 , wherein the one or more processors are configured to cause a processor in the multi-processor computing environment to transition between a non-active state and an active-idle state via one of:

(i) powering up a non-active processor;

(ii) powering down an active-idle processor;

(iii) waking up a non-active processor from a low power state;

(iv) placing an active-idle processor in a low power state; and

(v) sending an instruction to a processor control system.

19. The system of claim 11 , wherein the number of processors transitioned is equal to the predicted delta value.

20. The system of claim 11 , wherein the subsequent interval begins substantially concurrently with when the monitoring system causes a number of processors in the multi-processor computing environment to transition between a non-active state and an active-idle state.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 9, 2015
From: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
To: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Reel/Frame 037079/0001 →
MERGER Recorded Oct 2, 2015
From: EUCALYPTUS SYSTEMS, INC.
To: HEWLETT-PACKARD COMPANY
Reel/Frame 036711/0524 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 2, 2015
From: HEWLETT-PACKARD COMPANY
To: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Reel/Frame 036711/0620 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 15, 2013
From: WOLSKI, RICHARD MICHAEL; BREVIK, JOHN
To: EUCALYPTUS SYSTEMS, INC.
Reel/Frame 031611/0050 →
Continuity (1)
Related Publication 20140189410A1 · Jul 3, 2014