Three-dimensional offset-printed memory
View Patent ↗The present invention discloses a three-dimensional offset-printed memory (3D-oP). Compared with a conventional three-dimensional mask-programmed read-only memory (3D-MPROM), it has a lower data-mask count and thereby a lower data-mask cost. The mask-patterns for different memory levels/bits-in-a-cell are merged onto a multi-region data-mask. At different printing steps, a wafer is offset by different values with respect to said data-mask. Accordingly, data-patterns are printed into different memory levels/bits-in-a-cell from a same data-mask.
1. A three-dimensional offset-printed memory (3D-oP), comprising:
a semiconductor substrate;
a plurality of vertically stacked memory levels stacked above and coupled to said substrate, each of said memory levels comprising at least a data-coding layer, whose pattern represents a data-array;
wherein all devices in a same 3D-oP batch with said 3D-oP have a same data-array set; and at least two devices in said batch have different data-array sequences.
2. The 3D-oP according to claim 1 , further comprising a configurable-I/O means for configuring the input and/or output of said memory based on the data-array sequence in said memory.
3. The 3D-oP according to claim 2 , wherein said configurable-I/O means further comprises a storage means for storing the information related to the data-array sequence.
4. The 3D-oP according to claim 3 , wherein said storage means is a non-volatile writable memory.
5. The 3D-oP according to claim 1 , wherein said 3D-oP batch further includes first and second memory devices:
said first memory device comprises first and second memory levels, said second memory level stacked above said first memory level, said first memory level storing a first data-array, said second memory level storing a second data-array; and
said second memory device comprises third and fourth memory levels, said fourth memory level stacked above said third memory level, said third memory level storing said second data-array, said fourth memory level storing said first data-array.
6. The 3D-oP according to claim 5 , wherein each of said first and second memory devices further comprises a configurable-I/O means for changing the input of said memory device based on the data-array sequence.
7. The 3D-oP according to claim 1 , wherein said 3D-oP batch further includes first and second memory devices:
said first memory device comprises a first memory level, said first memory level storing first and second data-arrays, wherein said second data-array is located above said first data-array; and
said second memory device comprises a second memory level, said second memory level storing said first and second data-arrays, wherein said first data-array is located above said second data-array.
8. The 3D-oP according to claim 7 , wherein said each of said first and second memory devices further comprises a configurable-I/O means for changing the output of said memory device based on the data-array sequence.
9. The 3D-oP according to claim 1 belonging to a three-dimensional memory package, wherein said memory package comprises a plurality of vertically stacked 3D-oP dice.