High mobility, thin film transistors using semiconductor/insulator transition-metal dichalcogenide based interfaces

1. A thin film transistor, comprising:

a substrate;

a plurality of 2D atomic crystal layers formed atop the substrate, wherein the plurality of 2D atomic crystal layers comprise a 2D atomic crystal high-k insulator layer formed atop a 2D atomic crystal semiconductor layer;

an interface between the 2D atomic crystal semiconductor layer and the 2D atomic crystal high-k insulator layer, wherein the interface comprises van-der-Waals bonds;

a source electrode and a drain electrode disposed atop the 2D atomic crystal semiconductor layer in respective source and drain regions of the thin film transistor, wherein the source electrode and drain electrode define a channel region disposed between the source and drain regions; and

a gate electrode disposed atop 2D atomic crystal high-k insulator layer,

wherein the 2D atomic crystal high-k insulator layer comprises an electrically insulating transition metal dichalcogenide and the 2D atomic crystal semiconductor layer comprises a semiconducting transition metal dichalcogenide.

2. The transistor of claim 1 , wherein the substrate is at least one of silicon, glass, or plastic.

3. The transistor of claim 1 , further comprising another 2D atomic crystal layer between the first 2D atomic crystal layer and the substrate.

4. The transistor of claim 1 , wherein the interface is devoid of, or substantially devoid of dangling bonds.

5. The transistor of claim 1 , wherein the electrically insulating transition metal dichalcogenide and the semiconducting transition metal dichalcogenide each comprise a group IV-A or VI-A transition metal.

6. The transistor of claim 1 , wherein the electrically insulating transition metal dichalcogenide comprises: hafnium disulfide (HfS 2 ) or zirconium disulfide (ZrS 2 ).

7. The transistor of claim 1 , wherein the semiconducting transition metal dichalcogenide comprises: molybdenum disulfide (MoS 2 ), tungsten disulfide (WS 2 ), niobium disulfide (NbS 2 ), tantalum disulfide (TaS 2 ), vanadium disulfide (VS 2 ), rhenium disulfide (ReS2), tungsten selenide (WSe 2 ), molybdenum selenide (MoSe 2 ), or niobium selenide (NbSe 2 ).

8. A method of forming a thin film transistor, comprising:

depositing a first 2D atomic crystal layer atop a substrate;

depositing a second 2D atomic crystal layer atop the first 2D atomic crystal layer;

forming a source electrode and a drain electrode atop the second 2D atomic crystal layer in respective source and drain regions of the thin film transistor, wherein the source electrode and drain electrode define a channel region disposed between the source and drain regions;

depositing a third 2D atomic crystal layer atop the second 2D atomic crystal layer over the channel region and between the source and drain regions, wherein an interface between the third 2D atomic crystal layer atop the second 2D atomic crystal layer bonds the third 2D atomic crystal layer to the second 2D atomic crystal layer via van-der-Waals bonding; and

depositing a gate electrode atop the third 2D atomic crystal layer,.

wherein the first 2D atomic crystal layer and the third 2D atomic crystal layer comprise an electrically insulating transition metal dichalcogenide and the second 2D atomic crystal layer a semiconducting transition metal dichalcogenide.

9. The method of claim 8 , wherein the first 2D atomic crystal layer is a high-k insulator layer.

10. The method of claim 8 , wherein the first 2D atomic crystal layer is a semiconductor layer.

11. The method of claim 8 , wherein the first, second and third 2D atomic crystal layers are individual crystalline atomic planes produced either from a bottom-up synthesis process or extracted/cleaved from constituent bulk crystals.

12. The method of claim 8 , wherein the interface is devoid of, or substantially devoid of dangling bonds.

13. The method of claim 8 , wherein the electrically insulating transition metal dichalcogenide and the semiconducting transition metal dichalcogenide each comprise a group IV-A or VI-A transition metal.

14. The method of claim 8 , wherein the electrically insulating transition metal dichalcogenide comprises: hafnium disulfide (HfS 2 ) or zirconium disulfide (ZrS 2 ).

15. The method of claim 8 , wherein the semiconducting transition metal dichalcogenide comprises: molybdenum disulfide (MoS 2 ), tungsten disulfide (WS 2 ), niobium disulfide (NbS 2 ), tantalum disulfide (TaS 2 ), vanadium disulfide (VS 2 ), rhenium disulfide (ReS 2 ), tungsten selenide (WSe 2 ), molybdenum selenide (MoSe 2 ), or niobium selenide (NbSe 2 ).

16. The method of claim 8 , wherein the channel region is etched from a portion of the second 2D atomic crystal layer.

17. A field effect device, comprising:

a substrate;

a 2D atomic crystal high-k insulator layer comprising an electrically insulating transition metal dichalcogenide formed atop the substrate; and

a 2D atomic crystal semiconductor layer comprising a semiconducting transition metal dichalcogenide formed atop the first 2D atomic crystal high-k insulator layer,

wherein interfaces are formed between the 2D atomic crystal semiconductor layer and the 2D atomic crystal high-k insulator layer comprising van-der-Waals bonds.

18. A method of forming field effect device, comprising:

depositing a 2D atomic crystal high-k insulator layer comprising an electrically insulating transition metal dichalcogenide atop a substrate; and

depositing a 2D atomic crystal semiconductor layer comprising a semiconducting transition metal dichalcogenide atop the first 2D atomic crystal high-k insulator layer,

thereby forming interfaces between the 2D atomic crystal semiconductor layer and the 2D atomic crystal high-k insulator layer, wherein the interfaces comprises van-der-Waals bonds.