Method and apparatus of synchronizing oscillators

1. A circuit, comprising:

a first oscillator, comprising:

an inductive device;

a capacitive device; and

an active feedback device configured to output a first output signal having a predetermined frequency according to electrical characteristics of the inductive device of the first oscillator and electrical characteristics of the capacitive device of the first oscillator;

a second oscillator, comprising:

an inductive device;

a capacitive device; and

an active feedback device configured to output a second output signal having the predetermined frequency according to electrical characteristics of the inductive device of the second oscillator and electrical characteristics of the capacitive device of the second oscillator; and

the inductive device of the first oscillator and the inductive device of the second oscillator being magnetically coupled,

the inductive device of the first oscillator and the inductive device of the second oscillator having a distance equal to or less than a predetermined distance, and the predetermined distance is one half of a wavelength of an electromagnetic wave having the predetermined frequency.

2. The circuit of claim 1 , wherein the predetermined frequency ranges from 100 MHz to 20 GHz.

3. The circuit of claim 1 , wherein the inductive device of the first oscillator and the inductive device of the second oscillator are formed on different substrates on a same package substrate, different substrates of a stack of substrates, or different substrates of a stack of dies.

4. The circuit of claim 1 , further comprising:

a first conductive path and a second conductive path between the first oscillator and the second oscillator;

a first phase comparator adjacent to the first oscillator, the first phase comparator being configured to generate a first phase error signal according to a first signal from the first oscillator and a delayed version of a second signal from the second oscillator transmitted through the first conductive path;

a second phase comparator adjacent to the second oscillator, the second phase comparator being configured to generate a second phase error signal according to the second signal from the second oscillator and a delayed version of the first signal from the first oscillator transmitted through the second conductive path; and

a control unit configured to generate a tuning signal to the second oscillator according to the first phase error signal and a second phase error signal.

5. The circuit of claim 4 , wherein the capacitive device of the second oscillator further comprises a voltage controlled capacitor, and a capacitance value of the voltage controlled capacitor is adjustable responsive to the tuning signal.

6. The circuit of claim 4 , further comprising:

a first frequency divider configured to receive the first output signal and to generate the first signal by frequency-dividing the first output signal by a predetermined ratio; and

a second frequency divider configured to receive the second output signal and to generate the second signal by frequency-dividing the second output signal by the predetermined ratio.

7. The circuit of claim 1 , wherein

the circuit further comprises a pulse generator configured to generate a pulse signal;

the first oscillator further comprises an output node, a complementary output node, and a switch device between the output node of the first oscillator and the complementary output node of the first oscillator, the switch device of the first oscillator being controlled by the pulse signal; and

the second oscillator further comprises an output node, a complementary output node, and a switch device between the output node of the second oscillator and the complementary output node of the second oscillator, the switch device of the second oscillator being controlled by the pulse signal.

8. The circuit of claim 1 , wherein the pulse signal having a pulse frequency, and the predetermined frequency is an integer multiple of the pulse frequency.

9. The circuit of claim 1 , wherein a first conductive path configured to carry the pulse signal between the pulse generator and the first oscillator and a second conductive path configured to carry the pulse signal between the pulse generator and the second oscillator are configured to impose substantially a same delay to the pulse signal.

10. A circuit, comprising:

a pulse generator configured to generate a pulse signal;

a first oscillator, comprising:

an active feedback device configured to output a first output signal having a predetermined frequency; and

a reset device configured to set the first output signal at a first predetermined voltage level responsive to the pulse signal; and

a second oscillator, comprising:

an active feedback device configured to output a second output signal having the predetermined frequency; and

a reset device configured to set the second output signal at a second predetermined voltage level responsive to the pulse signal,

the pulse signal having a pulse frequency, and the predetermined frequency is an integer multiple of the pulse frequency.

11. The circuit of claim 10 , wherein a first conductive path configured to carry the pulse signal between the pulse generator and the first oscillator and a second conductive path configured to carry the pulse signal between the pulse generator and the second oscillator are configured to impose substantially a same delay to the pulse signal.

12. The circuit of claim 10 , wherein the first oscillator further comprises:

an inductive device;

a capacitive device; and

the active feedback device of the first oscillator is configured to output the first output signal according to electrical characteristics of the inductive device of the first oscillator and electrical characteristics of the capacitive device of the first oscillator.

13. The circuit of claim 12 , wherein the second oscillator further comprises:

an inductive device;

a capacitive device;

the active feedback device of the second oscillator is configured to output the second output signal according to electrical characteristics of the inductive device of the second oscillator and electrical characteristics of the capacitive device of the second oscillator; and

the inductive device of the first oscillator and the inductive device of the second oscillator being magnetically coupled.

14. The circuit of claim 10 , wherein the active feedback device of the first oscillator comprises an odd number of inverters connected as a loop or an odd number of differential amplifiers connected as a loop.

15. A method of synchronizing a first oscillator and a second oscillator, comprising:

operating the first oscillator to output a first oscillating signal;

operating the second oscillator to output a second oscillating signal;

magnetically coupling an inductive device of the first oscillator and an inductive device of the second oscillator,

the inductive device of the first oscillator and the inductive device of the second oscillator having a distance equal to or less than a predetermined distance, and the predetermined distance is one half of a wavelength of an electromagnetic wave having a predetermined frequency.

16. The method of claim 15 , further comprising:

generating a first phase error signal based on a first signal from the first oscillator and a delayed version of a second signal from the second oscillator transmitted through a first conductive path;

generating a second phase error signal based on the second signal from the second oscillator and a delayed version of the first signal from the first oscillator transmitted through a second conductive path;

generating a tuning signal based on the first phase error signal and the second phase error signal; and

adjusting a frequency or a phase of the second oscillating signal based on the tuning signal.

17. The method of claim 16 , further comprising:

generating the first signal by frequency-dividing the first oscillating signal by a predetermined ratio; and

generating the second signal by frequency-dividing the second oscillating signal by the predetermined ratio.

18. The method of claim 15 , further comprising:

generating a pulse signal;

setting the first oscillating signal at a first predetermined voltage level by a switch device of the first oscillator responsive to the pulse signal; and

setting the second oscillating signal at a second predetermined voltage level by a switch device of the second oscillator responsive to the pulse signal.

19. The method of claim 18 , further comprising:

transmitting the pulse signal to the switch device of the first oscillator through a first conductive path;

transmitting the pulse signal to the switch device of the second oscillator through a second conductive path; and

the first conductive path and the second conductive path are configured to impose substantially a same delay to the pulse signal.