IP Library › Granted Patent US 9,191,596
Granted Patent B2
US 9,191,596 · App. 14/019,279 · Granted Nov 17, 2015

Solid-state imaging device, control method and electronic apparatus to obtain frame difference output values

Inventor: Shuuji Sonoda (Kumamoto, JP)
Assignee: SONY CORPORATION
H04N5/372H01L27/14634H04N5/378H04N5/3741H04N5/3745H04N5/37455
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Quick Facts
Patent No.
US 9,191,596
App. No.
14/019,279
Granted
Nov 17, 2015
Kind
B2
Abstract

A solid-state imaging device includes: a pixel array unit with pixels, each of the pixels including a photoelectric conversion element that generates a charge and a memory that holds the charge; and an AD conversion unit that converts a pixel signal corresponding to the charge output from the pixel into a count value. The pixel transfers the charge held in the memory in the n th frame and sequentially outputs, in the n th +1 frame, a first pixel signal corresponding to the charge held in the memory and a second pixel signal corresponding to a charge generated by the photoelectric conversion element after the previous charge has been transferred to the memory. In the n th +1 frame, the AD conversion unit changes its up/down count direction between the first and second pixel signals to obtain their count values so as to successively perform AD conversion on the first and second pixel signals.

Claims (20)

1. A solid-state imaging device comprising:

a pixel array unit with a plurality of pixels arranged therein, each of the plurality of pixels including at least a photoelectric conversion element that generates a charge corresponding to light received and a memory that holds the charge generated by the photoelectric conversion element; and

an AD conversion unit that performs AD conversion processing to convert a pixel signal that corresponds to the charge output from a pixel into a count value, wherein

the pixel transfers the charge generated by the photoelectric conversion element to the memory so as to hold the charge in the memory in a n th frame, and sequentially outputs, in a (n+1) th frame, a first pixel signal corresponding to the charge held in the memory and a second pixel signal corresponding to a charge generated by the photoelectric conversion element after the previous charge has been transferred to the memory, and

the AD conversion unit, in the (n+1) th frame, changes its up/down count direction between the first pixel signal and the second pixel signal to obtain their count values so as to successively perform AD conversion on the first pixel signal and the second pixel signal, wherein the AD conversion on the first pixel signal of the n th frame and the successive AD conversion on the second pixel signal of the (n+1) th frame have a period for measurement of a reset component before a period for measurement of a combination of a signal component and the reset component.

2. The solid-state imaging device according to claim 1 , wherein the AD conversion unit includes

a comparator that outputs a difference signal obtained by comparing a reference signal of a ramp waveform with the pixel signal output from the pixel, and

a counter that performs a count operation over a period in which the difference signal is at a predetermined level, wherein

the counter starts counting the difference signal associated with the second pixel signal starting from a count value of the difference signal associated with the first pixel signal.

3. The solid-state imaging device according to claim 1 , further comprising a signal processing circuit that determines the presence or absence of changes in a subject on the basis of the count value of the difference between the first pixel signal and the second pixel signal.

4. The solid-state imaging device according to claim 1 , further comprising a circuit configured to calculate frequency distributions of frame difference output values between the n th frame and the (n+1) th frame, wherein the frequency distributions are calculated based on the count value.

5. A method for controlling a solid-state imaging device, the method comprising:

causing a pixel, of a pixel array unit with a plurality of pixels arranged therein, to transfer a charge generated by a photoelectric conversion element of the pixel to a memory so as to hold the charge in the memory in a nth frame, and to sequentially output, in a (n+1) th frame, a first pixel signal corresponding to the charge held in the memory and a second pixel signal corresponding to a charge generated by the photoelectric conversion element after the previous charge has been transferred to the memory; and

causing an AD conversion unit, in the (n+1) th frame, to change its up/down count direction between the first pixel signal and the second pixel signal to obtain their count values so as to successively perform AD conversion on the first pixel signal and the second pixel signal,

wherein the AD conversion on the first pixel signal of the n th frame and the successive AD conversion on the second pixel signal of the (n+1) th frame have a period for measurement of a reset component before a period for measurement of a combination of a signal component and the reset component.

6. An electronic apparatus comprising a solid-state imaging device including:

a pixel array unit with a plurality of pixels arranged therein, each of the plurality of pixels including at least a photoelectric conversion element that generates a charge corresponding to light received and a memory that holds the charge generated by the photoelectric conversion element; and

an AD conversion unit that performs AD conversion processing to convert a pixel signal that corresponds to the charge output from a pixel into a count value, wherein

the pixel transfers the charge generated by the photoelectric conversion element to the memory so as to hold the charge in the memory in a n th frame, and sequentially outputs, in a (n+1) th frame, a first pixel signal corresponding to the charge held in the memory and a second pixel signal corresponding to a charge generated by the photoelectric conversion element after the previous charge has been transferred to the memory, and

the AD conversion unit, in the (n+1) th frame, changes its up/down count direction between the first pixel signal and the second pixel signal to obtain their count values so as to successively perform AD conversion on the first pixel signal and the second pixel signal, wherein the AD conversion on the first pixel signal of the n th frame and the successive AD conversion on the second pixel signal of the (n+1) th frame have a period for measurement of a reset component before a period for measurement of a combination of a signal component and the reset component.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 5, 2013
From: SONODA, SHUUJI
To: SONY CORPORATION
Reel/Frame 031146/0973 →
Priority Claims (1)
JP 2012-204107 · Sep 18, 2012 · national
Continuity (1)
Related Publication 20140078367A1 · Mar 20, 2014