IP Library Granted Patent US 9,198,294
Granted Patent B2
US 9,198,294 · App. 13/989,751 · Granted Nov 24, 2015

Electronic device for radiofrequency or power applications and process for manufacturing such a device

Inventors: Didier Landru (Champ Pres Froges, FR); Luciana Capello (Grenoble, FR); Eric Desbonnet (Lumbin, FR); Christophe Figuet (Crolles, FR); Oleg Kononchuk (Grenoble, FR)
Assignee: SOITEC
H05K1/18H01L21/76251H01L21/76254
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Quick Facts
Patent No.
US 9,198,294
App. No.
13/989,751
Granted
Nov 24, 2015
Kind
B2
Abstract

The invention relates to an electronic device for radiofrequency or power applications, comprising a semiconductor layer supporting electronic components on a support substrate, wherein the support substrate comprises a base layer having a thermal conductivity of at least 30 W/mK and a superficial layer having a thickness of at least 5 μm, the superficial layer having an electrical resistivity of at least 3000 Ohm·cm and a thermal conductivity of at least 30 W/mK. The invention also relates to two processes for manufacturing such a device.

Claims (23)

1. An electronic device for radiofrequency or power applications, comprising:

a support substrate including a base layer having a thermal conductivity of at least 30 W/mK and a superficial layer having a thickness of at least 5 μm, the superficial layer having an electrical resistivity of at least 3000 Ohm·cm and thermal conductivity of at least 30 W/mK;

a semiconductor layer supporting electronic components on the support substrate;

a bonding layer between the support substrate and the semiconductor layer supporting the electronic components, the bonding layer comprising at least one of a silicon oxide layer having a thickness of less than 50 nm, a layer of AlN, a layer of alumina, and a layer of high-resistivity polycrystalline silicon.

2. The electronic device of claim 1 , wherein the support substrate comprises a silicon base substrate.

3. The electronic device of claim 1 , wherein the support substrate comprises an aluminum substrate encased with an AlN or alumina coating having a thickness greater than 5 μm.

4. The electronic device of claim 1 , wherein the semiconductor layer supporting the electronic components comprises silicon, germanium, or a group III-V alloy.

5. The electronic device of claim 1 , wherein the electronic device comprises a wafer having a diameter greater than or equal to 150 mm.

6. The electronic device of claim 1 , wherein the electronic device is a chip.

7. The electronic device of claim 1 , wherein the superficial layer is between the base layer and the semiconductor layer.

8. A method for manufacturing a device for radiofrequency or power applications, the device having a layer supporting electronic components on a support substrate, the method comprising the following successive steps:

a) formation of a structure comprising a semiconductor layer bonded on the support substrate by way of a bonding layer formed on the semiconductor layer, the bonding layer comprising at least one of a silicon oxide layer having a thickness of less than 50 nm, a layer of AlN, a layer of alumina, and a layer of high-resistivity polycrystalline silicon; and

b) manufacture of the electronic components in the semiconductor layer;

wherein, during step (a), the support substrate comprises a base layer having a thermal conductivity of at least 30 W/mK and a superficial layer having a thickness of at least 5 μm, the superficial layer having an electrical resistivity of at least 3000 Ohm·cm and thermal conductivity of at least 30 W/mK.

9. The method of claim 8 , wherein the support substrate comprises a silicon base substrate.

10. A method for manufacturing a device for radiofrequency or power applications, the device having a layer supporting electronic components on a support substrate, the method comprising the following successive steps:

a) manufacturing the electronic components in a semiconductor layer of a donor substrate;

b) bonding the semiconductor layer supporting the electronic components on an intermediate substrate;

c) removing a remainder of the donor substrate and transferring the semiconductor layer supporting the components onto the intermediate substrate;

d) bonding of the semiconductor layer supporting the electronic components on the support substrate; and

e) removing the intermediate substrate;

wherein a bonding layer is present at an interface between the support substrate and the semiconductor layer supporting the electronic components, the bonding layer selected from the group consisting of a silicon oxide layer having a thickness of less than 50 nm, a layer of AlN, a layer of alumina, and a layer of high-resistivity polycrystalline silicon, and wherein, in step (d), a support substrate is used comprising a base layer having a thermal conductivity of at least 30 W/mK and a superficial layer having a thickness of at least 5 μm, the superficial layer having an electrical resistivity of at least 3000 Ohm·cm and thermal conductivity of at least 30 W/mK.

11. The method of claim 10 , wherein the support substrate comprises a silicon base substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 16, 2013
From: LANDRU, DIDIER; CAPELLO, LUCIANA; DESBONNETS, ERIC; FIGUET, CHRISTOPHE; KONONCHUK, OLEG
To: SOITEC
Reel/Frame 031211/0204 →
Priority Claims (1)
FR 10 59539 · Nov 19, 2010 · national
Continuity (1)
Related Publication 20130294038A1 · Nov 7, 2013