Image processing unit, image processing apparatus and image display system
An image processing unit including an always on circuit block and a non-always on circuit block is provided. When operating under a first operation mode, the non-always on circuit block receives a bias voltage from a power supply unit, so as to perform an image processing operation on an image input signal. When operating under a second operation mode, the non-always on circuit block stops receiving the bias voltage from the power supply unit, so as to stop the image processing operation, and at least a microcontroller of the non-always on circuit block is powered down. One of the always on circuit block and the non-always on circuit block controls the power supply unit to stop supplying the bias voltage to the non-always on circuit block according an event trigger signal, such that the non-always on circuit block enters the second operation mode from the first operation mode.
1. An image processing unit, comprising:
an always on circuit block, configured to receive a first bias voltage from a power supply unit, wherein the first bias voltage serves as an operating voltage for the always on circuit block; and
a non-always on circuit block, comprising a microcontroller of the image processing unit, wherein when the non-always on circuit block operates under a first operation mode, the non-always on circuit block receives a second bias voltage from the power supply unit served as an operating voltage for the non-always on circuit block, so as to perform an image processing operation on an image input signal, and when the non-always on circuit block operates under a second operation mode, the non-always on circuit block stops receiving the second bias voltage from the power supply unit, so as to stop the image processing operation, and at least the microcontroller of the non-always on circuit block is powered down;
wherein the always on circuit block controls the power supply unit to start supplying the second bias voltage to the non-always on circuit block according a second event trigger signal, such that the non-always on circuit block enters the first operation mode from the second operation mode; and
wherein one of the always on circuit block and the non-always on circuit block controls the power supply unit to stop supplying the second bias voltage to the non-always on circuit block according a first event trigger signal, such that the non-always on circuit block enters the second operation mode from the first operation mode.
2. The image processing unit as claimed in claim 1 , wherein the always on circuit block outputs an operation stop signal to the non-always on circuit block according to the first event trigger signal, the non-always on circuit block outputs a power down signal to the always on circuit block according to the operation stop signal, the always on circuit block controls the power supply unit to stop supplying the second bias voltage to the non-always on circuit block according to the power down signal, such that the non-always on circuit block enters the second operation mode from the first operation mode.
3. The image processing unit as claimed in claim 2 , wherein the microcontroller in the non-always on circuit block is configured to receive the operation stop signal.
4. The image processing unit as claimed in claim 1 , wherein the always on circuit block outputs a power down signal to the power supply unit according to the first event trigger signal, the power supply unit stops supplying the second bias voltage to the non-always on circuit block according to the power down signal, such that the non-always on circuit block enters the second operation mode from the first operation mode.
5. The image processing unit as claimed in claim 1 , wherein the non-always on circuit block further includes an input interface of the image processing unit.
6. An image processing apparatus, configured to drive a display panel, the image processing apparatus comprising:
the power supply unit, configured to provide the first bias voltage and the second bias voltage; and
the image processing unit as claimed in claim 1 , coupled to the power supply unit.
7. The image processing apparatus as claimed in claim 6 , wherein the power supply unit comprises a first power supply block and a second power supply block respectively providing the first bias voltage and the second bias voltage.
8. The image processing apparatus as claimed in claim 7 , wherein
the first power supply block is configured to receive a direct current (DC) voltage, and generates the first bias voltage according to the DC voltage, and
the second power supply block is configured to receive the first bias voltage, and generates the second bias voltage according to the first bias voltage.
9. The image processing apparatus as claimed in claim 8 , wherein the first bias voltage is smaller than the DC voltage, and the second bias voltage is smaller than the first bias voltage.
10. The image processing apparatus as claimed in claim 7 , wherein
the first power supply block is configured to receive a DC voltage, and generates a third bias voltage according to the DC voltage,
the second power supply block is configured to receive the third bias voltage, and generates the second bias voltage according to the third bias voltage, and
the power supply unit further comprises a voltage dividing unit configured to divide the third bias voltage to generate the first bias voltage.
11. The image processing apparatus as claimed in claim 8 , further comprising:
a power conversion circuit, configured to receive an alternating current (AC) voltage, and converting the AC voltage into the DC voltage.
12. An image display system, comprising:
the image processing apparatus as claimed in claim 6 ; and
a display panel, driven by the image processing apparatus to display an image.
13. The image display system as claimed in claim 12 , further comprising:
a power conversion circuit, configured to receive an alternating current (AC) voltage, and converting the AC voltage into a DC voltage for providing to the power supply unit in the image processing apparatus.
14. An image processing unit, comprising:
an always on circuit block, configured to receive a first bias voltage from a power supply unit, wherein the first bias voltage serves as an operating voltage for the always on circuit block; and
a non-always on circuit block, comprising a microcontroller of the image processing unit, wherein when the non-always on circuit block operates under a first operation mode, the non-always on circuit block receives a second bias voltage from the power supply unit served as an operating voltage for the non-always on circuit block, so as to perform an image processing operation on an image input signal, and when the non-always on circuit block operates under a second operation mode, the non-always on circuit block stops receiving the second bias voltage from the power supply unit, so as to stop the image processing operation, and at least the microcontroller in the non-always on circuit block is powered down;
wherein the always on circuit block outputs an operation stop signal to the non-always on circuit block according to a first event trigger signal, the non-always on circuit block outputs a power down signal to the always on circuit block according to the operation stop signal, the always on circuit block controls the power supply unit to stop supplying the second bias voltage to the non-always on circuit block according to the power down signal, such that the non-always on circuit block enters the second operation mode from the first operation mode.
15. The image processing unit as claimed in claim 14 , wherein the always on circuit block controls the power supply unit to start supplying the second bias voltage to the non-always on circuit block according to a second event trigger signal, such that the non-always on circuit block enters the first operation mode from the second operation mode.
16. An image processing unit, comprising:
an always on circuit block, configured to receive a first bias voltage from a power supply unit, wherein the first bias voltage serves as an operating voltage for the always on circuit block; and
a non-always on circuit block, comprising a microcontroller of the image processing unit, wherein when the non-always on circuit block operates under a first operation mode, the non-always on circuit block receives a second bias voltage from the power supply unit served as an operating voltage for the non-always on circuit block, so as to perform an image processing operation on an image input signal, and when the non-always on circuit block operates under a second operation mode, the non-always on circuit block stops receiving the second bias voltage from the power supply unit, so as to stop the image processing operation, and at least the microcontroller in the non-always on circuit block is powered down,
wherein the always on circuit block outputs a power down signal to the power supply unit according to a first event trigger signal, the power supply unit stops supplying the second bias voltage to the non-always on circuit block according to the power down signal, such that the non-always on circuit block enters the second operation mode from the first operation mode.
17. The image processing unit as claimed in claim 16 , wherein the always on circuit block controls the power supply unit to start supplying the second bias voltage to the non-always on circuit block according to a second event trigger signal, such that the non-always on circuit block enters the first operation mode from the second operation mode.